Re: [Qemu-devel] [PATCH 0/2] Implement YIELD to yield in ARM and Thumb translators

[Paolo Bonzini <pbonzini@redhat.com>]

On 26/06/2015 16:04, Peter Maydell wrote:
> Ping?

Oh, YIELD was what I was thinking of in the thread about IPIs, not WFE
(which would require SEV on the other core)...

The patches look good, but I cannot really say much about this code.

Paolo

> thanks
> -- PMM
> 
> On 15 June 2015 at 19:49, Peter Maydell <peter.maydell@linaro.org> wrote:
>> This patchset makes the ARM and Thumb encodings of the YIELD hint
>> instruction in the ARM cause the TCG CPU to yield control back
>> to the top level loop. This brings them into line with the A64
>> encoding which already did this.
>>
>> Patch 1 splits out DISAS_YIELD from DISAS_WFE, because although
>> we currently implement them both the same way they're semantically
>> different, and in future we might well make WFE do something
>> else. (In particular when I was reviewing Greg's patches that
>> proposed enabling trap-to-EL2-on-WFE I didn't notice that we
>> would also have ended up trapping on YIELD !)
>>
>>
>> Peter Maydell (2):
>>   target-arm: Split DISAS_YIELD from DISAS_WFE
>>   target-arm: Implement YIELD insn to yield in ARM and Thumb translators
>>
>>  target-arm/helper.h        |  1 +
>>  target-arm/op_helper.c     | 12 ++++++++++++
>>  target-arm/translate-a64.c |  6 ++++++
>>  target-arm/translate.c     |  7 +++++++
>>  target-arm/translate.h     |  1 +
>>  5 files changed, 27 insertions(+)
> 
>