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From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Fri, 26 Jun 2015 18:54:15 +0200
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Subject: Re: [Qemu-devel] [RFC PATCH V6 15/18] cpu: introduce tlb_flush*_all.
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: mttcg@greensocs.com, Alexander Spyridakis <a.spyridakis@virtualopensystems.com>, Mark Burton <mark.burton@greensocs.com>, Alexander Graf <agraf@suse.de>, QEMU Developers <qemu-devel@nongnu.org>, Guillaume Delbergue <guillaume.delbergue@greensocs.com>, Alistair Francis <alistair.francis@xilinx.com>, =?UTF-8?Q?Alex_Benn=c3=a9e?= <alex.bennee@linaro.org>, Frederic Konrad <fred.konrad@greensocs.com>



On 26/06/2015 18:08, Peter Maydell wrote:
>> > Yeah, ISTR that in some cases you have to wait for other CPUs to
>> > invalidate the TLB before proceeding.  Maybe it's only when you have=
 a
>> > dmb instruction, but it's probably simpler for QEMU to always do it
>> > synchronously.
> Yeah, the ARM architectural requirement here is that the TLB
> operation is complete after a DSB instruction executes. (True for
> any TLB op, not just the all-CPUs ones). NB that we also call
> tlb_flush() from target-arm/ code for some things like "we just
> updated a system register"; some of those have "must take effect
> immediately" semantics.
>=20
> In any case, for generic code we have to also consider the
> semantics of non-ARM guests...

I think it would be okay to make this an ARM-specific thing.  In most
other architectures that I know of, TLB shootdowns are done in software
thorough IPI.

Paolo