From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42892) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZBTa1-0004hu-0k for qemu-devel@nongnu.org; Sat, 04 Jul 2015 15:58:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZBTZv-0005gE-Qq for qemu-devel@nongnu.org; Sat, 04 Jul 2015 15:58:28 -0400 Received: from mail-la0-x229.google.com ([2a00:1450:4010:c03::229]:33514) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZBTZv-0005fa-IQ for qemu-devel@nongnu.org; Sat, 04 Jul 2015 15:58:23 -0400 Received: by laar3 with SMTP id r3so116385288laa.0 for ; Sat, 04 Jul 2015 12:58:21 -0700 (PDT) Message-ID: <55983AD7.2030700@gmail.com> Date: Sat, 04 Jul 2015 22:58:15 +0300 From: Dmitry Osipenko MIME-Version: 1.0 References: <1435877531-24983-1-git-send-email-digetx@gmail.com> <1435877531-24983-4-git-send-email-digetx@gmail.com> In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH 3/3] arm_mptimer: Respect IT bit state List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , QEMU Developers , Paolo Bonzini Hello Peter, 04.07.2015 22:39, Peter Crosthwaite пишет: > > You also need to trigger timerblock_update_irq on change of state for > the control bit itself. "case 8: /* Control. */" in the _write > handler needs to call this fn. > Right, as it will mask/unmask interrupt line. Good catch, thanks. -- Dmitry