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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Crosthwaite <crosthwaitepeter@gmail.com>, qemu-devel@nongnu.org
Cc: Peter Crosthwaite <crosthwaite.peter@gmail.com>, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v2] cpu_defs: Simplify CPUTLB padding logic
Date: Thu, 9 Jul 2015 17:04:08 +0200	[thread overview]
Message-ID: <559E8D68.7000703@redhat.com> (raw)
In-Reply-To: <1436412413-27389-1-git-send-email-crosthwaite.peter@gmail.com>



On 09/07/2015 05:26, Peter Crosthwaite wrote:
> There was a complicated subtractive arithmetic for determining the
> padding on the CPUTLBEntry structure. Simplify this with a union.
> 
> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
> ---
> Changed since v1:
> Remove un-needed anonymous union (Paolo review)
> ---
>  include/exec/cpu-defs.h | 21 ++++++++++-----------
>  1 file changed, 10 insertions(+), 11 deletions(-)
> 
> diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
> index 98b9cff..c6828cc 100644
> --- a/include/exec/cpu-defs.h
> +++ b/include/exec/cpu-defs.h
> @@ -98,24 +98,23 @@ typedef uint64_t target_ulong;
>  
>  #define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
>  
> -typedef struct CPUTLBEntry {
> +typedef union CPUTLBEntry {
>      /* bit TARGET_LONG_BITS to TARGET_PAGE_BITS : virtual address
>         bit TARGET_PAGE_BITS-1..4  : Nonzero for accesses that should not
>                                      go directly to ram.
>         bit 3                      : indicates that the entry is invalid
>         bit 2..0                   : zero
>      */
> -    target_ulong addr_read;
> -    target_ulong addr_write;
> -    target_ulong addr_code;
> -    /* Addend to virtual address to get host address.  IO accesses
> -       use the corresponding iotlb value.  */
> -    uintptr_t addend;
> +    struct {
> +        target_ulong addr_read;
> +        target_ulong addr_write;
> +        target_ulong addr_code;
> +        /* Addend to virtual address to get host address.  IO accesses
> +           use the corresponding iotlb value.  */
> +        uintptr_t addend;
> +    };
>      /* padding to get a power of two size */
> -    uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
> -                  (sizeof(target_ulong) * 3 +
> -                   ((-sizeof(target_ulong) * 3) & (sizeof(uintptr_t) - 1)) +
> -                   sizeof(uintptr_t))];
> +    uint8_t dummy[1 << CPU_TLB_ENTRY_BITS];
>  } CPUTLBEntry;
>  
>  QEMU_BUILD_BUG_ON(sizeof(CPUTLBEntry) != (1 << CPU_TLB_ENTRY_BITS));
> 

Thanks, queued for 2.5.

Paolo

      parent reply	other threads:[~2015-07-09 15:04 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-09  3:26 [Qemu-devel] [PATCH v2] cpu_defs: Simplify CPUTLB padding logic Peter Crosthwaite
2015-07-09  6:56 ` Richard Henderson
2015-07-09 15:04 ` Paolo Bonzini [this message]

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