From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36055) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZF3kO-0003Kw-3M for qemu-devel@nongnu.org; Tue, 14 Jul 2015 13:12:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZF3kJ-0001oF-3n for qemu-devel@nongnu.org; Tue, 14 Jul 2015 13:12:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35677) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZF3kI-0001nW-Ua for qemu-devel@nongnu.org; Tue, 14 Jul 2015 13:11:55 -0400 References: <1436888717-8122-1-git-send-email-aurelien@aurel32.net> <1436888717-8122-3-git-send-email-aurelien@aurel32.net> <55A53633.1050106@redhat.com> <20150714164503.GB7569@aurel32.net> From: Paolo Bonzini Message-ID: <55A542D6.1030501@redhat.com> Date: Tue, 14 Jul 2015 19:11:50 +0200 MIME-Version: 1.0 In-Reply-To: <20150714164503.GB7569@aurel32.net> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] target-mips: simplify LWL/LDL mask generation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: Leon Alrae , =?UTF-8?Q?Herv=c3=a9_Poussineau?= , qemu-devel@nongnu.org On 14/07/2015 18:45, Aurelien Jarno wrote: >>> > > >>> > > mask = 0x7fffffffffffffffull >> (t1 ^ 63) >>> > > >>> > > It's simpler to generate it by doing: >>> > > >>> > > mask = (1 << t1) - 1 >> > >> > Using ~(-1 << t1) may let you use an ANDN instruction, and is also the >> > same number of instructions on x86. >> > > Indeed thanks for the hint. The generated code has the same size, but is > one instruction less: > > mov 0x88(%rsp),%r10 > shlx %r10,%rbx,%rbx > - mov $0x1,%r11d > + mov $0xffffffffffffffff,%r11 > shlx %r10,%r11,%r11 > - dec %r11 > mov 0x18(%r14),%r10 > - and %r11,%r10 > + andn %r10,%r11,%r10 > or %r10,%rbx > movslq %ebx,%rbx Oh, indeed I forgot about the fancy new x86 bit manipulation instructions! Even better. :) Paolo