From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37463) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFqbC-00087N-MH for qemu-devel@nongnu.org; Thu, 16 Jul 2015 17:21:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZFqb8-0001t5-WC for qemu-devel@nongnu.org; Thu, 16 Jul 2015 17:21:46 -0400 Received: from mail-wg0-x231.google.com ([2a00:1450:400c:c00::231]:34267) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZFqb8-0001sX-Pw for qemu-devel@nongnu.org; Thu, 16 Jul 2015 17:21:42 -0400 Received: by wgkl9 with SMTP id l9so68070897wgk.1 for ; Thu, 16 Jul 2015 14:21:40 -0700 (PDT) Sender: Richard Henderson References: <1436968536-24106-1-git-send-email-aurelien@aurel32.net> From: Richard Henderson Message-ID: <55A8205C.30902@twiddle.net> Date: Thu, 16 Jul 2015 22:21:32 +0100 MIME-Version: 1.0 In-Reply-To: <1436968536-24106-1-git-send-email-aurelien@aurel32.net> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH for-2.4] tcg/i386: ignore high bits for user mode 32-bit qemu_ld/st List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , qemu-devel@nongnu.org Cc: Paolo Bonzini , Leon Alrae On 07/15/2015 02:55 PM, Aurelien Jarno wrote: > Fix that by either using the ADDR32 prefix (in case GUEST_BASE == 0 or > a segment register is in use), or by doing an explicit zero-extension. > The zero-extension can be done in place as we know the registers holds > a 32-bit value. I'd prefer not to do that, even if we can show that it's true. I have an alternative that I'll post shortly. r~