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From: "Ефимов Василий" <real@ispras.ru>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: Kirill Batuzov <batuzovk@ispras.ru>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2] PAM: make PAM emulation closer to documentation
Date: Tue, 21 Jul 2015 14:09:48 +0300	[thread overview]
Message-ID: <55AE287C.5070801@ispras.ru> (raw)
In-Reply-To: <55ADF8CB.8050500@redhat.com>

21.07.2015 10:46, Paolo Bonzini пишет:

> Out of curiosity, would it be necessary to flush the TLB when the PAM
> registers change?
>
> In QEMU, the TLB also has the function of a cache in some sense
> (because, by pointing to a ram_addr_t, it prevents reads, writes or
> fetches from going through the slow MMIO path).
There is exec.c: tcg_commit callback. It calls
cpu-exec.c: cpu_reload_memory_map that calls cputlb.c:tlb_flush.

When PAM register is changed pam_update is called. Its call is
surrounded by memory_region_transaction_begin/_commit couple both in
i440fx and MCH9 host bridges. tcg_commit and pam_mem_commit are called
during memory_region_transaction_commit execution.

To summarize:
- TLB is flushed by existing code.
- Should I remove pam_update_redirection call from pam_set_current?
It will be called by pam_mem_commit soon? Note that a PAM API user
should call memory_region_transaction_begin/_commit in this case.
>
> Paolo
>
Vasily

  reply	other threads:[~2015-07-21 11:09 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-20 10:53 [Qemu-devel] [PATCH v2] PAM: make PAM emulation closer to documentation Efimov Vasily
2015-07-21  7:46 ` Paolo Bonzini
2015-07-21 11:09   ` Ефимов Василий [this message]
2015-07-22 16:37 ` Kevin O'Connor
2015-07-24 10:11   ` Ефимов Василий
2015-09-07 10:41 ` Ефимов Василий
2015-09-07 12:50 ` Paolo Bonzini
2015-09-09 12:03   ` Ефимов Василий
2015-09-09 12:11     ` Paolo Bonzini

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