* [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation
@ 2015-07-23 22:14 Richard Henderson
2015-07-23 22:21 ` Aurelien Jarno
2015-07-23 22:27 ` Eric Blake
0 siblings, 2 replies; 3+ messages in thread
From: Richard Henderson @ 2015-07-23 22:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Paolo Bonzini, Claudio Fontana, Aurelien Jarno
Similar to the same fix for user-mode, except this instance
ocurrs on the softmmu path. Again, the softmmu addend must
be the base register, while the guest address is the index.
Cc: Claudio Fontana <claudio.fontana@huawei.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
While applying Paolo's fix for user-mode, I noticed this.
I've never seen this fail, but obviously what we have is wrong.
This patch depends on Paolo's cleanup.
r~
---
tcg/aarch64/tcg-target.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index 4aca883..b7ec4f5 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -1204,18 +1204,18 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi, TCGType ext)
{
TCGMemOp memop = get_memop(oi);
+ const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 1);
- tcg_out_qemu_ld_direct(s, memop, ext, data_reg, addr_reg,
- TCG_TYPE_I64, TCG_REG_X1);
+ tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
+ TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
- const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg);
@@ -1226,18 +1226,18 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,
TCGMemOpIdx oi)
{
TCGMemOp memop = get_memop(oi);
+ const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
#ifdef CONFIG_SOFTMMU
unsigned mem_index = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
tcg_insn_unit *label_ptr;
tcg_out_tlb_read(s, addr_reg, s_bits, &label_ptr, mem_index, 0);
- tcg_out_qemu_st_direct(s, memop, data_reg, addr_reg,
- TCG_TYPE_I64, TCG_REG_X1);
+ tcg_out_qemu_st_direct(s, memop, data_reg,
+ TCG_REG_X1, otype, addr_reg);
add_qemu_ldst_label(s, false, oi, s_bits == MO_64, data_reg, addr_reg,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
- const TCGType otype = TARGET_LONG_BITS == 64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
tcg_out_qemu_st_direct(s, memop, data_reg,
GUEST_BASE ? TCG_REG_GUEST_BASE : TCG_REG_XZR,
otype, addr_reg);
--
2.4.3
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation
2015-07-23 22:14 [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation Richard Henderson
@ 2015-07-23 22:21 ` Aurelien Jarno
2015-07-23 22:27 ` Eric Blake
1 sibling, 0 replies; 3+ messages in thread
From: Aurelien Jarno @ 2015-07-23 22:21 UTC (permalink / raw)
To: Richard Henderson; +Cc: Paolo Bonzini, Claudio Fontana, qemu-devel
On 2015-07-23 15:14, Richard Henderson wrote:
> Similar to the same fix for user-mode, except this instance
> ocurrs on the softmmu path. Again, the softmmu addend must
> be the base register, while the guest address is the index.
>
> Cc: Claudio Fontana <claudio.fontana@huawei.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>
> While applying Paolo's fix for user-mode, I noticed this.
> I've never seen this fail, but obviously what we have is wrong.
>
> This patch depends on Paolo's cleanup.
>
>
> r~
> ---
> tcg/aarch64/tcg-target.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
Good catch!
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation
2015-07-23 22:14 [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation Richard Henderson
2015-07-23 22:21 ` Aurelien Jarno
@ 2015-07-23 22:27 ` Eric Blake
1 sibling, 0 replies; 3+ messages in thread
From: Eric Blake @ 2015-07-23 22:27 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
Cc: Paolo Bonzini, Claudio Fontana, Aurelien Jarno
[-- Attachment #1: Type: text/plain, Size: 581 bytes --]
On 07/23/2015 04:14 PM, Richard Henderson wrote:
> Similar to the same fix for user-mode, except this instance
> ocurrs on the softmmu path. Again, the softmmu addend must
s/ocurrs/occurs/
> be the base register, while the guest address is the index.
>
> Cc: Claudio Fontana <claudio.fontana@huawei.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>
--
Eric Blake eblake redhat com +1-919-301-3266
Libvirt virtualization library http://libvirt.org
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-07-23 22:14 [Qemu-devel] [PATCH] tcg/aarch64: use 32-bit offset for 32-bit softmmu emulation Richard Henderson
2015-07-23 22:21 ` Aurelien Jarno
2015-07-23 22:27 ` Eric Blake
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