From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMggW-0005Cl-FV for qemu-devel@nongnu.org; Tue, 04 Aug 2015 14:11:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZMggV-0001Z4-GK for qemu-devel@nongnu.org; Tue, 04 Aug 2015 14:11:32 -0400 Sender: Richard Henderson References: <1438593291-27109-1-git-send-email-alex.bennee@linaro.org> <1438593291-27109-10-git-send-email-alex.bennee@linaro.org> <55C0CFB9.3090105@twiddle.net> <87bnenkls0.fsf@linaro.org> From: Richard Henderson Message-ID: <55C1004A.2020300@twiddle.net> Date: Tue, 4 Aug 2015 11:11:22 -0700 MIME-Version: 1.0 In-Reply-To: <87bnenkls0.fsf@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v4 09/11] target-arm: dfilter support for in_asm, op, opt_op List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Alex_Benn=c3=a9e?= Cc: Peter Maydell , qemu-trivial@nongnu.org, qemu-devel@nongnu.org, crosthwaitepeter@gmail.com, pbonzini@redhat.com, aurelien@aurel32.net On 08/04/2015 10:26 AM, Alex Bennée wrote: > > Richard Henderson writes: > >> On 08/03/2015 02:14 AM, Alex Bennée wrote: >>> Each individual architecture needs to use the qemu_log_in_addr_range() >>> feature for enabling in_asm and marking blocks for op/opt_op output. >>> >>> Signed-off-by: Alex Bennée >>> --- >>> target-arm/translate-a64.c | 6 ++++-- >>> target-arm/translate.c | 6 ++++-- >>> 2 files changed, 8 insertions(+), 4 deletions(-) >>> >>> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c >>> index 689f2be..0b0f4ae 100644 >>> --- a/target-arm/translate-a64.c >>> +++ b/target-arm/translate-a64.c >>> @@ -11026,7 +11026,8 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, >>> gen_io_start(); >>> } >>> >>> - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { >>> + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT) && >>> + qemu_log_in_addr_range(dc->pc))) { >>> tcg_gen_debug_insn_start(dc->pc); >>> } >> >> If there's more than one or two ranges, it's probably quicker to >> generate the debug opcode regardless of the range. Remember, this >> check is happening once per insn, not once per tb. > > Maybe I should hoist the check up to the start of a block? This would > mean we would dump all instructions in a block even if they went past > the end-point but the reverse case is probably just confusing. > > We'll still not dump anything that starts outside the range. Why hoist when the loglevel_mask check is so quick? Processing of these debug opcodes is equally quick. It's really only the dumping of the opcodes elsewhere that needs to check the addr_range. r~