From: Christopher Covington <cov@codeaurora.org>
To: "Alex Bennée" <alex.bennee@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [RFC 01/14] Make unknown semihosting calls non-fatal
Date: Thu, 06 Aug 2015 13:59:11 -0400 [thread overview]
Message-ID: <55C3A06F.7030406@codeaurora.org> (raw)
In-Reply-To: <87twsckci6.fsf@linaro.org>
Hi Alex,
Thanks for taking a look.
On 08/06/2015 05:11 AM, Alex Bennée wrote:
>
> Christopher Covington <cov@codeaurora.org> writes:
>
>> Signed-off-by: Christopher Covington <cov@codeaurora.org>
>> ---
>> target-arm/arm-semi.c | 7 +++----
>> 1 file changed, 3 insertions(+), 4 deletions(-)
>>
>> diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c
>> index a8b83e6..bcc70ec 100644
>> --- a/target-arm/arm-semi.c
>> +++ b/target-arm/arm-semi.c
>> @@ -186,8 +186,6 @@ static void arm_semi_flen_cb(CPUState *cs, target_ulong ret, target_ulong err)
>> #define SET_ARG(n, val) put_user_ual(val, args + (n) * 4)
>> uint32_t do_arm_semihosting(CPUARMState *env)
>> {
>> - ARMCPU *cpu = arm_env_get_cpu(env);
>> - CPUState *cs = CPU(cpu);
>> target_ulong args;
>> target_ulong arg0, arg1, arg2, arg3;
>> char * s;
>> @@ -195,6 +193,8 @@ uint32_t do_arm_semihosting(CPUARMState *env)
>> uint32_t ret;
>> uint32_t len;
>> #ifdef CONFIG_USER_ONLY
>> + ARMCPU *cpu = arm_env_get_cpu(env);
>> + CPUState *cs = CPU(cpu);
>> TaskState *ts = cs->opaque;
>> #else
>> CPUARMState *ts = env;
>> @@ -562,7 +562,6 @@ uint32_t do_arm_semihosting(CPUARMState *env)
>> exit(ret);
>> default:
>> fprintf(stderr, "qemu: Unsupported SemiHosting SWI 0x%02x\n", nr);
>> - cpu_dump_state(cs, stderr, fprintf, 0);
>> - abort();
>> + return -1;
>
> Do SemiHosting calls return anything to the guest? If so removing the
> abort means the guest may go unpredictable if the call is just ignored.
> If so the argument would be to leave the abort() in and just add the
> missing semihosting calls.
If were to pursue this further, I would want to review how external debuggers
supporting semihosting on hardware behave. However my current thinking is that
there are more commonly used mechanisms than semihosting that we can move to
for equivalent functionality.
Functionality: standard mechanism
Guest-initiated host filesystem access: VirtIO 9P passthrough filesystem
Guest-initiated exit: poweroff (PSCI)
Guest-initiated instruction counting: perf stat -e instructions:u (PMU)
Guest-initiated checkpoint dump: [maybe QMP over guest agent VirtIO serial?]
Thanks,
Christopher Covington
--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2015-08-06 17:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-05 16:51 [Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 01/14] Make unknown semihosting calls non-fatal Christopher Covington
2015-08-06 9:11 ` Alex Bennée
2015-08-06 17:59 ` Christopher Covington [this message]
2015-08-05 16:51 ` [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-system mode Christopher Covington
2015-08-11 18:16 ` Peter Maydell
2015-08-05 16:51 ` [Qemu-devel] [RFC 03/14] Fix makefile Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 04/14] Modify load exclusive/store exclusive to use physical addresses with the monitor Christopher Covington
2015-09-23 17:19 ` [Qemu-devel] [PATCHv2] target-arm: Use physical addresses for ldrex/strex Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 05/14] Fixed TLB invalidate ops Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 06/14] Added support for block profiling for AArch32 and Aarch64 Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 07/14] Add PMU to ARM virt platform Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 08/14] Add instruction-counting infrastructure to target-arm Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 09/14] Implement remaining PMU functionality Christopher Covington
2016-02-02 21:22 ` Alistair Francis
2016-02-02 23:01 ` Christopher Covington
2016-02-02 23:22 ` Alistair Francis
2016-02-03 18:37 ` Peter Maydell
2016-02-04 0:37 ` Alistair Francis
2015-08-05 16:51 ` [Qemu-devel] [RFC 10/14] bbvec: Move mode/PID change detection to register writes Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 11/14] Print bbvec stats on 'magic' exceptions Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 12/14] bbvec: Detect mode changes after uncached_cpsr update Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 13/14] Enable negative icount values for QEMU Christopher Covington
2015-08-05 16:51 ` [Qemu-devel] [RFC 14/14] bbvec: Properly detect conditional thumb2 branching instructions Christopher Covington
2015-08-11 15:27 ` [Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes Peter Maydell
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