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From: Richard Henderson <rth@twiddle.net>
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Date: Tue, 11 Aug 2015 16:13:59 -0700
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Subject: Re: [Qemu-devel] [PATCH for-2.5 01/30] m68k: define m680x0 CPUs and
 features
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To: Laurent Vivier <laurent@vivier.eu>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, Andreas Schwab <schwab@linux-m68k.org>, gerg@uclinux.org

On 08/09/2015 01:13 PM, Laurent Vivier wrote:
>      INSN(undef,     0000, 0000, CF_ISA_A);
> +    INSN(undef,     0000, 0000, M68000);
>      INSN(arith_im,  0080, fff8, CF_ISA_A);
> +    INSN(arith_im,  0000, ff00, M68000);
> +    INSN(undef,     00c0, ffc0, M68000);
>      INSN(bitrev,    00c0, fff8, CF_ISA_APLUSC);
>      INSN(bitop_reg, 0100, f1c0, CF_ISA_A);
> +    INSN(bitop_reg, 0100, f1c0, M68000);
>      INSN(bitop_reg, 0140, f1c0, CF_ISA_A);
> +    INSN(bitop_reg, 0140, f1c0, M68000);

There's a *lot* of repetition in here.

Can we also introduce a BASE() macro that's like INSN() except that it doesn't
bother checking m68k_feature?  That way if both CF_ISA_A and M68000 are set, we
don't have to duplicate the entry.


r~