From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41058) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZPP8b-0000TX-Qp for qemu-devel@nongnu.org; Wed, 12 Aug 2015 02:03:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZPP8W-0005Rt-RY for qemu-devel@nongnu.org; Wed, 12 Aug 2015 02:03:45 -0400 Received: from mail-qg0-x231.google.com ([2607:f8b0:400d:c04::231]:35109) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZPP8W-0005Rj-No for qemu-devel@nongnu.org; Wed, 12 Aug 2015 02:03:40 -0400 Received: by qgj62 with SMTP id 62so4658766qgj.2 for ; Tue, 11 Aug 2015 23:03:40 -0700 (PDT) Sender: Richard Henderson References: <1439151229-27747-1-git-send-email-laurent@vivier.eu> <1439151229-27747-13-git-send-email-laurent@vivier.eu> From: Richard Henderson Message-ID: <55CAE1B7.90104@twiddle.net> Date: Tue, 11 Aug 2015 23:03:35 -0700 MIME-Version: 1.0 In-Reply-To: <1439151229-27747-13-git-send-email-laurent@vivier.eu> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH for-2.5 12/30] m68k: Manage divw overflow List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Vivier , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, Andreas Schwab , gerg@uclinux.org On 08/09/2015 01:13 PM, Laurent Vivier wrote: > "Overflow may be detected and set before the instruction completes. > If the instruction detects an overflow, it sets the overflow condition > code, and the operands are unaffected." May also implies may not. I presume this is important for matching hardware? Is there some program you know of that depends on this? > + /* dest.l / src.w */ > + > + dest = DREG(insn, 9); > + tcg_gen_mov_i32(QREG_DIV1, dest); > + > SRC_EA(env, src, OS_WORD, sign, NULL); > tcg_gen_mov_i32(QREG_DIV2, src); > + > + /* div1 / div2 */ > + > if (sign) { > gen_helper_divs(cpu_env, tcg_const_i32(1)); > } else { > gen_helper_divu(cpu_env, tcg_const_i32(1)); > } > > + set_cc_op(s, CC_OP_FLAGS); > + > + l1 = gen_new_label(); > + gen_jmpcc(s, 9 /* V */, l1); > tmp = tcg_temp_new(); > src = tcg_temp_new(); > tcg_gen_ext16u_i32(tmp, QREG_DIV1); > tcg_gen_shli_i32(src, QREG_DIV2, 16); > - tcg_gen_or_i32(reg, tmp, src); > - set_cc_op(s, CC_OP_FLAGS); > + tcg_gen_or_i32(dest, tmp, src); > + gen_set_label(l1); All that said, it's possible to implement this branch inside the helper via exception. Or simply return the inputs to effect no change. r~