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From: Paolo Bonzini <pbonzini@redhat.com>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: Re: [Qemu-devel] [PATCH 3/3] tcg: signal-free qemu_cpu_kick
Date: Mon, 17 Aug 2015 13:47:40 -0700	[thread overview]
Message-ID: <55D2486C.1020103@redhat.com> (raw)
In-Reply-To: <55D22882.1000200@twiddle.net>



On 17/08/2015 11:31, Richard Henderson wrote:
> On 08/14/2015 06:15 AM, Paolo Bonzini wrote:
>> +    atomic_mb_set(&current_cpu, cpu);
> ...
>> +        cpu_exit(atomic_rcu_read(&current_cpu));
> 
> Mixing java and rcu style sync to the same data structure?

Well, I usually read rcu_read as CONSUME, rcu_set as RELEASE, mb_read as
either ACQUIRE or "SEQ_CST without IRIW" and mb_set as "SEQ_CST without
IRIW".  But you're right that the patch is unreadable.

>> +                         * ensure tcg_exit_req is read before exit_request
>> +                         * or interrupt_request.
>>                           */
>> +                        smp_rmb();
>>                          next_tb = 0;
> 
> This I don't understand, since we've just read exit_request above, and you're
> putting the barrier here?

If we see cpu->exit_request == 1, we exit.  In that case,
cpu->tcg_exit_req doesn't matter.

Here we saw cpu->exit_request == 0 and then got TB_EXIT_REQUESTED.
Because of TB_EXIT_REQUESTED we know cpu->tcg_exit_req is 1; the
smp_rmb() ensures that cpu->exit_request will be read as 1 on the next
iteration.

Paolo

>> +        /* Ensure whatever caused the exit has reached the CPU threads before
>> +         * writing exit_request.
>> +         */
>> +        smp_wmb();
>> +        exit_request = 1;
>> +        /* Ignore the CPU argument since all CPUs run in the same thread;
>> +         * preempt the currently running one.  The memory barriers ensures
>> +         * that other CPUs will see the request if the current CPU is
>> +         * preempted.
>> +         */
>> +        smp_wmb();
>> +        cpu_exit(atomic_rcu_read(&current_cpu));
> 
> ...
> 
>> +    /* Pairs with smp_wmb in qemu_cpu_kick.  */
>> +    atomic_mb_set(&exit_request, 0);
>>  }
> 
> Bare barriers and java style sync to the same data structure?
> 
>>      cpu->exit_request = 1;
>> +    /* Ensure cpu_exec will see the exit request after TCG has exited.  */
>> +    smp_wmb();
>>      cpu->tcg_exit_req = 1;
>>  }
> 
> Likewise.
> 
> I find this mixing highly confusing.  I see no way to prove that it's going to
> be right for non-x86.
> 
> 
> r~
> 
> 

      reply	other threads:[~2015-08-17 20:48 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-14 13:15 [Qemu-devel] [PATCH 0/3] Signal-free qemu_cpu_kick for TCG Paolo Bonzini
2015-08-14 13:15 ` [Qemu-devel] [PATCH 1/3] i8257: rewrite DMA_schedule to avoid hooking into the CPU loop Paolo Bonzini
2015-08-14 13:15 ` [Qemu-devel] [PATCH 2/3] i8257: remove cpu_request_exit irq Paolo Bonzini
2015-08-14 13:15 ` [Qemu-devel] [PATCH 3/3] tcg: signal-free qemu_cpu_kick Paolo Bonzini
2015-08-17 18:31   ` Richard Henderson
2015-08-17 20:47     ` Paolo Bonzini [this message]

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