From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53880) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZSTRn-0006eG-A3 for qemu-devel@nongnu.org; Thu, 20 Aug 2015 13:16:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZSTRh-0007BX-3Y for qemu-devel@nongnu.org; Thu, 20 Aug 2015 13:16:14 -0400 Received: from mail-wi0-f174.google.com ([209.85.212.174]:35620) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZSTRg-00079I-TW for qemu-devel@nongnu.org; Thu, 20 Aug 2015 13:16:09 -0400 Received: by wicne3 with SMTP id ne3so151706704wic.0 for ; Thu, 20 Aug 2015 10:16:07 -0700 (PDT) Message-ID: <55D60B51.1000201@tuxfamily.org> Date: Thu, 20 Aug 2015 10:16:01 -0700 From: Thomas Huth MIME-Version: 1.0 References: <1439897731-3645-1-git-send-email-phil@philkern.de> <1439898655-6275-1-git-send-email-phil@philkern.de> In-Reply-To: <1439898655-6275-1-git-send-email-phil@philkern.de> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Philipp Kern , qemu-devel@nongnu.org, Richard Henderson , Alexander Graf On 18/08/15 04:50, Philipp Kern wrote: > According to "CPU Signaling and Response", "Signal-Processor Orders", > the order field is bit position 56-63. Without this, the Linux > guest kernel is sometimes unable to stop emulation and enters > an infinite loop of "XXX unknown sigp: 0xffffffff00000005". > > Signed-off-by: Philipp Kern > --- > target-s390x/misc_helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c > index 8eac0e1..0f0907c 100644 > --- a/target-s390x/misc_helper.c > +++ b/target-s390x/misc_helper.c > @@ -500,7 +500,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, > /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register" > as parameter (input). Status (output) is always R1. */ > > - switch (order_code) { > + switch (order_code & 0xff) { > case SIGP_SET_ARCH: > /* switch arch */ > break; Reviewed-by: Thomas Huth (by the way, please make sure to copy the maintainers on CC: or your patch might get lost in the high traffic of qemu-devel mailing list)