From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42901) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTh5o-0000Y2-Bg for qemu-devel@nongnu.org; Sun, 23 Aug 2015 22:02:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTh5l-00042L-5R for qemu-devel@nongnu.org; Sun, 23 Aug 2015 22:02:36 -0400 Received: from mail-wi0-x22f.google.com ([2a00:1450:400c:c05::22f]:34260) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTh5k-000426-Ui for qemu-devel@nongnu.org; Sun, 23 Aug 2015 22:02:33 -0400 Received: by widdq5 with SMTP id dq5so36124996wid.1 for ; Sun, 23 Aug 2015 19:02:32 -0700 (PDT) Sender: Paolo Bonzini References: <1440375847-17603-1-git-send-email-cota@braap.org> <1440375847-17603-15-git-send-email-cota@braap.org> From: Paolo Bonzini Message-ID: <55DA7B36.4030702@redhat.com> Date: Sun, 23 Aug 2015 19:02:30 -0700 MIME-Version: 1.0 In-Reply-To: <1440375847-17603-15-git-send-email-cota@braap.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [RFC 14/38] softmmu: add helpers to get ld/st physical addresses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Emilio G. Cota" , qemu-devel@nongnu.org, mttcg@greensocs.com Cc: guillaume.delbergue@greensocs.com, alex.bennee@linaro.org, mark.burton@greensocs.com, a.rigo@virtualopensystems.com, Frederic Konrad On 23/08/2015 17:23, Emilio G. Cota wrote: > This will be used by the atomic instruction emulation code. Is this a fast path? If not, we can use the existing addend field and convert the host address to a ram_addr_t easily. Paolo > Signed-off-by: Emilio G. Cota > --- > softmmu_template.h | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ > tcg/tcg.h | 5 +++++ > 2 files changed, 53 insertions(+) > > diff --git a/softmmu_template.h b/softmmu_template.h > index b66eaf8..6496a8a 100644 > --- a/softmmu_template.h > +++ b/softmmu_template.h > @@ -480,6 +480,54 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, > #endif > } > > +#if DATA_SIZE == 1 > + > +/* get a load's physical address */ > +hwaddr helper_ret_get_ld_phys(CPUArchState *env, target_ulong addr, > + int mmu_idx, uintptr_t retaddr) > +{ > + int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); > + CPUTLBEntry *te = &env->tlb_table[mmu_idx][index]; > + target_ulong taddr; > + target_ulong phys_addr; > + > + retaddr -= GETPC_ADJ; > + taddr = te->addr_read & (TARGET_PAGE_MASK | TLB_INVALID_MASK); > + if (taddr != (addr & TARGET_PAGE_MASK)) { > + if (!VICTIM_TLB_HIT(addr_read)) { > + CPUState *cs = ENV_GET_CPU(env); > + > + tlb_fill(cs, addr, MMU_DATA_LOAD, mmu_idx, retaddr); > + } > + } > + phys_addr = te->addr_phys; > + return phys_addr | (addr & ~TARGET_PAGE_MASK); > +} > + > +/* get a store's physical address */ > +hwaddr helper_ret_get_st_phys(CPUArchState *env, target_ulong addr, > + int mmu_idx, uintptr_t retaddr) > +{ > + int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); > + CPUTLBEntry *te = &env->tlb_table[mmu_idx][index]; > + target_ulong taddr; > + target_ulong phys_addr; > + > + retaddr -= GETPC_ADJ; > + taddr = te->addr_write & (TARGET_PAGE_MASK | TLB_INVALID_MASK); > + if (taddr != (addr & TARGET_PAGE_MASK)) { > + if (!VICTIM_TLB_HIT(addr_write)) { > + CPUState *cs = ENV_GET_CPU(env); > + > + tlb_fill(cs, addr, MMU_DATA_STORE, mmu_idx, retaddr); > + } > + } > + phys_addr = te->addr_phys; > + return phys_addr | (addr & ~TARGET_PAGE_MASK); > +} > + > +#endif /* DATA_SIZE == 1 */ > + > #if DATA_SIZE > 1 > void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, > TCGMemOpIdx oi, uintptr_t retaddr) > diff --git a/tcg/tcg.h b/tcg/tcg.h > index 66b36f2..8d30d61 100644 > --- a/tcg/tcg.h > +++ b/tcg/tcg.h > @@ -992,6 +992,11 @@ void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val, > void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val, > TCGMemOpIdx oi, uintptr_t retaddr); > > +hwaddr helper_ret_get_ld_phys(CPUArchState *env, target_ulong addr, > + int mmu_idx, uintptr_t retaddr); > +hwaddr helper_ret_get_st_phys(CPUArchState *env, target_ulong addr, > + int mmu_idx, uintptr_t retaddr); > + > /* Temporary aliases until backends are converted. */ > #ifdef TARGET_WORDS_BIGENDIAN > # define helper_ret_ldsw_mmu helper_be_ldsw_mmu >