From: Alexander Graf <agraf@suse.de>
To: Anton Blanchard <anton@samba.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] target-ppc: Fix SRR0 when taking unaligned exceptions
Date: Wed, 26 Aug 2015 11:44:30 +0200 [thread overview]
Message-ID: <55DD8A7E.5080708@suse.de> (raw)
In-Reply-To: <20150702144406.40bce749@kryten>
On 02.07.15 06:44, Anton Blanchard wrote:
> We are setting SRR0 to the instruction before the one causing the
> unaligned exception. A quick testcase:
>
> . = 0x100
> .globl _start
> _start:
> /* Cause a 0x600 */
> li 3,0x1
> stwcx. 3,0,3
> 1: b 1b
>
> . = 0x600
> 1: b 1b
>
> Built into something we can load as a BIOS image:
>
> gcc -mbig -c test.S
> ld -EB -Ttext 0x0 -o test test.o
> objcopy -O binary test test.bin
>
> Run with:
>
> qemu-system-ppc64 -nographic -bios test.bin
>
> Shows an incorrect SRR0 (points at the li):
>
> SRR0 0000000000000100
>
> With the patch we get the correct SRR0:
>
> SRR0 0000000000000104
>
> Signed-off-by: Anton Blanchard <anton@samba.org>
Thanks, applied to ppc-next.
Alex
next prev parent reply other threads:[~2015-08-26 9:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-02 4:44 [Qemu-devel] target-ppc: Fix SRR0 when taking unaligned exceptions Anton Blanchard
2015-08-26 9:44 ` Alexander Graf [this message]
2015-09-08 22:21 ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
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