From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVBIx-0003Td-By for qemu-devel@nongnu.org; Fri, 28 Aug 2015 00:30:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZVBIw-000640-Gx for qemu-devel@nongnu.org; Fri, 28 Aug 2015 00:30:19 -0400 Sender: Richard Henderson References: <1440719254-12349-1-git-send-email-afaerber@suse.de> From: Richard Henderson Message-ID: <55DFE3CC.4030806@twiddle.net> Date: Thu, 27 Aug 2015 21:30:04 -0700 MIME-Version: 1.0 In-Reply-To: <1440719254-12349-1-git-send-email-afaerber@suse.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH] tcg/aarch64: Fix tcg_out_qemu_{ld, st} for linux-user List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Andreas_F=c3=a4rber?= , qemu-devel@nongnu.org Cc: Paolo Bonzini , Claudio Fontana , "v2.4.0" , Aurelien Jarno On 08/27/2015 04:47 PM, Andreas Färber wrote: > The argument order for the !CONFIG_SOFTMMU case was jumbled up since > ffc6372851d8631a9f9fa56ec613b3244dc635b9 ("tcg/aarch64: use 32-bit > offset for 32-bit user-mode emulation"), regressing from -rc2 to v2.4.0. > Fix their order to avoid segfaults, e.g., in openSUSE's GNU coreutils 8.24. Nack. The argument order is correct, that is... > - tcg_out_qemu_ld_direct(s, memop, ext, data_reg, > - guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR, > - otype, addr_reg); > + tcg_out_qemu_ld_direct(s, memop, ext, data_reg, addr_reg, otype, > + guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR); TCG_REG_GUEST_BASE is definitely the "base" register, holding a 64-bit host address, while addr_reg is the "offset" register, holding a (potentially) 32-bit guest address. It is (supposed to be) the "offset" register to which the zero-extend is applied. If something's wrong, and I'm not currently in a position to verify one way or another, it's in tcg_out_insn_3310. r~