From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60067) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXr7g-0003zz-TF for qemu-devel@nongnu.org; Fri, 04 Sep 2015 09:33:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXr7c-0000LD-RT for qemu-devel@nongnu.org; Fri, 04 Sep 2015 09:33:44 -0400 Received: from mail.uni-paderborn.de ([131.234.142.9]:55516) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXr7c-0000KM-LD for qemu-devel@nongnu.org; Fri, 04 Sep 2015 09:33:40 -0400 References: <1441239463-18981-1-git-send-email-rth@twiddle.net> <1441239463-18981-8-git-send-email-rth@twiddle.net> From: Bastian Koppelmann Message-ID: <55E99DB0.4090508@mail.uni-paderborn.de> Date: Fri, 4 Sep 2015 15:33:36 +0200 MIME-Version: 1.0 In-Reply-To: <1441239463-18981-8-git-send-email-rth@twiddle.net> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 07/17] target-openrisc: Keep SR_CY and SR_OV in a separate variables List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, proljc@gmail.com On 09/03/2015 02:17 AM, Richard Henderson wrote: > - > -uint32_t HELPER(mul32)(CPUOpenRISCState *env, > - uint32_t ra, uint32_t rb) > -{ > - uint64_t result; > - uint32_t high, cy; > - > - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); > - > - result = (uint64_t)ra * rb; > - /* regisiers in or32 is 32bit, so 32 is NOT a magic number. > - or64 is not handled in this function, and not implement yet, > - TARGET_LONG_BITS for or64 is 64, it will break this function, > - so, we didn't use TARGET_LONG_BITS here. */ > - high = result >> 32; > - cy = result >> (32 - 1); > - > - if ((cy & 0x1) == 0x0) { > - if (high == 0x0) { > - return result; > - } > - } > - > - if ((cy & 0x1) == 0x1) { > - if (high == 0xffffffff) { > - return result; > - } > - } > - > - cpu->env.sr |= (SR_OV | SR_CY); > - if (cpu->env.sr & SR_OVE) { > - raise_exception(cpu, EXCP_RANGE); > - } > - > - return result; > -} This ought to be part of patch 02, where you removed the last use of helper_mul32. Other than that, Reviewed-by: Bastian Koppelmann Cheers, Bastian