From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43587) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbaDP-0004YD-19 for qemu-devel@nongnu.org; Mon, 14 Sep 2015 16:19:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbaDL-0006tV-65 for qemu-devel@nongnu.org; Mon, 14 Sep 2015 16:19:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43586) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbaDL-0006tD-0z for qemu-devel@nongnu.org; Mon, 14 Sep 2015 16:18:59 -0400 References: <1441999509-26881-1-git-send-email-ehabkost@redhat.com> <55F32C53.8050606@twiddle.net> <20150911195859.GN3574@thinpad.lan.raisama.net> <55F49331.5030104@redhat.com> <55F70232.4090105@twiddle.net> <55F702AD.4030408@redhat.com> <55F7048A.3020706@twiddle.net> From: Paolo Bonzini Message-ID: <55F72BAC.6020701@redhat.com> Date: Mon, 14 Sep 2015 22:18:52 +0200 MIME-Version: 1.0 In-Reply-To: <55F7048A.3020706@twiddle.net> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 0/4] target-i386: Don't try to enable unsupported TCG features by default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , Eduardo Habkost Cc: Igor Mammedov , qemu-devel@nongnu.org, =?UTF-8?Q?Andreas_F=c3=a4rber?= On 14/09/2015 19:31, Richard Henderson wrote: > On 09/14/2015 10:23 AM, Paolo Bonzini wrote: >> >> >> On 14/09/2015 19:21, Richard Henderson wrote: >>>>> About implementing DE in TCG: I really don't think it is easier, but if >>>>>>> somebody wants to implement it, it would be welcome. >>>>> >>>>> Actually I agree that it's easier, and even a partial implementation >>>>> (e.g. no I/O port breakpoints) would be nice to have because recent >>>>> Windows IIRC requires DE. >>> Isn't I/O port breakpoints the only thing we're missing from DE? >> >> I was thinking of the CR4 bit, but it looks like we don't raise #GP at >> all on writes to unknown CR0 or CR4 bits. > > Nor do we #gp accesses to dr[45] with DE, nor map dr[45] to dr[67] without DE. > > Does the i/o breakpoint happen before or after the access? If before, we could > implement the breakpoint in check_io. Otherwise we'd need a new helper. Table 6-3 says it's a trap, so it occurs after. Paolo