From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50475) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbctN-0007WS-DG for qemu-devel@nongnu.org; Mon, 14 Sep 2015 19:10:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZbctJ-0006YJ-Af for qemu-devel@nongnu.org; Mon, 14 Sep 2015 19:10:33 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:36132) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZbctJ-0006Y3-58 for qemu-devel@nongnu.org; Mon, 14 Sep 2015 19:10:29 -0400 Received: by padhk3 with SMTP id hk3so156194670pad.3 for ; Mon, 14 Sep 2015 16:10:28 -0700 (PDT) References: <1442259039-22137-1-git-send-email-mark.cave-ayland@ilande.co.uk> <1442259039-22137-3-git-send-email-mark.cave-ayland@ilande.co.uk> From: Alexey Kardashevskiy Message-ID: <55F753DE.2080003@ozlabs.ru> Date: Tue, 15 Sep 2015 09:10:22 +1000 MIME-Version: 1.0 In-Reply-To: <1442259039-22137-3-git-send-email-mark.cave-ayland@ilande.co.uk> Content-Type: text/plain; charset=koi8-r; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC PATCH 2/2] target-ppc: add CPU IRQ state to PPC VMStateDescription List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Mark Cave-Ayland , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de On 09/15/2015 05:30 AM, Mark Cave-Ayland wrote: > Commit a90db15 "target-ppc: Convert ppc cpu savevm to VMStateDescription" > appears to drop the internal CPU IRQ state from the migration stream. Whilst > testing migration on g3beige/mac99 machines, test images would randomly fail to > resume unless a key was pressed on the VGA console. > > Further investigation suggests that internal CPU IRQ state isn't being > preserved and so interrupts asserted at the time of migration are lost. Adding > the pending_interrupts and irq_input_state fields back into the migration > stream appears to fix the problem here during local tests. On spapr, interrupt state migrates with XICS interrupt controller and it resets the CPU bits you are adding to the migration descriptor. I'd expect openpic (this one is used for mac99?) to do the same. > > Signed-off-by: Mark Cave-Ayland > --- > target-ppc/machine.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target-ppc/machine.c b/target-ppc/machine.c > index bd99844..968a7d6 100644 > --- a/target-ppc/machine.c > +++ b/target-ppc/machine.c > @@ -528,6 +528,8 @@ const VMStateDescription vmstate_ppc_cpu = { > > /* Internal state */ > VMSTATE_UINTTL(env.hflags_nmsr, PowerPCCPU), > + VMSTATE_UINT32(env.pending_interrupts, PowerPCCPU), > + VMSTATE_UINT32(env.irq_input_state, PowerPCCPU), This update requires a "version" increment for vmstate_ppc_cpu and VMSTATE_UINT32_V instead of VMSTATE_UINT32. > /* FIXME: access_type? */ > > /* Sanity checking */ > -- Alexey