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From: Leon Alrae <leon.alrae@imgtec.com>
To: Pavel Dovgaluk <Pavel.Dovgaluk@ispras.ru>,
	'Aurelien Jarno' <aurelien@aurel32.net>
Cc: pbonzini@redhat.com, rth7680@gmail.com, qemu-devel@nongnu.org,
	agraf@suse.de
Subject: Re: [Qemu-devel] [PATCH v7 04/11] target-mips: improve exception handling
Date: Tue, 15 Sep 2015 17:45:58 +0100	[thread overview]
Message-ID: <55F84B46.6080606@imgtec.com> (raw)
In-Reply-To: <000a01d0e171$1f43de80$5dcb9b80$@Dovgaluk@ispras.ru>

On 28/08/2015 10:08, Pavel Dovgaluk wrote:
>> From: Aurelien Jarno [mailto:aurelien@aurel32.net]
>> On 2015-08-13 14:12, Leon Alrae wrote:
>>> On 10/07/2015 10:57, Pavel Dovgalyuk wrote:
>>>> @@ -2364,14 +2363,12 @@ static void gen_st_cond (DisasContext *ctx, uint32_t opc, int rt,
>>>>  #if defined(TARGET_MIPS64)
>>>>      case OPC_SCD:
>>>>      case R6_OPC_SCD:
>>>> -        save_cpu_state(ctx, 1);
>>>>          op_st_scd(t1, t0, rt, ctx);
>>>>          opn = "scd";
>>>>          break;
>>>>  #endif
>>>>      case OPC_SC:
>>>>      case R6_OPC_SC:
>>>> -        save_cpu_state(ctx, 1);
>>>>          op_st_sc(t1, t0, rt, ctx);
>>>>          opn = "sc";
>>>>          break;
>>>
>>> Wouldn't we be better off assuming that conditional stores in linux-user
>>> always take an exception (we generate fake EXCP_SC exception) and avoid
>>> retranslation? After applying these changes I observed significant impact on
>>> performance in linux-user multithreaded apps, for instance c11-atomic-exec
>>> test before the change took just 2 seconds to finish, whereas now more than 30...
>>
>> This really show the impact of retranslation and why we should avoid
>> it when not necessary. Coming back to the issue here, the fact that we
>> go through retranslation is actually due to the fact that
>> helper_raise_exception has been changed to go through retranslation.
>>
>> Given the code path between user-mode and softmmu is quite different,
>> we definitely need a different code path wrt exception and retranslation
>> for the two cases. That said if we want deterministic code execution
>> (the original purpose of this patch), I don't see how we can do without
>> forcing retranslation. Pavel, do you have an idea for that?
> 
> There is only one case when we can execute without retranslation -
> when the instruction is the last instruction in translation block.
> Then we can setup PC and flags before this last instruction.
> If the exception happens, we can just break the execution.
> The drawback of this method is breaking translation blocks into
> the smaller parts.

c11-atomic-exec.4 test execution time in linux-user:

* no changes:
real    0m3.039s
user    0m2.976s
sys     0m1.908s

* tb_lock + patch:
real    1m1.167s
user    0m57.240s
sys     0m36.678s

* tb_lock + patch + SC-without-retranslation:
real    0m3.016s
user    0m2.988s
sys     0m1.848s

I had to add tb_lock() to cpu_restore_state() in the first place, otherwise
all of my multithreaded user mode tests crash QEMU with this patch.

SC-without-retranslation (the diff below) seems to improve the situation,
and if I understand correctly we retain deterministic code execution.
Therefore if there are no objections I'll apply this patch + SC correction
to mips-next.

Thanks,
Leon

diff --git a/target-mips/translate.c b/target-mips/translate.c
index 99b99c5..006cb96 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -2060,7 +2060,7 @@ static inline void op_st_##insn(TCGv arg1, TCGv arg2, int rt, DisasContext *ctx)
     tcg_gen_movi_tl(t0, rt | ((almask << 3) & 0x20));                        \
     tcg_gen_st_tl(t0, cpu_env, offsetof(CPUMIPSState, llreg));                   \
     tcg_gen_st_tl(arg1, cpu_env, offsetof(CPUMIPSState, llnewval));              \
-    gen_helper_0e0i(raise_exception, EXCP_SC);                               \
+    generate_exception_end(ctx, EXCP_SC);                                    \
     gen_set_label(l2);                                                       \
     tcg_gen_movi_tl(t0, 0);                                                  \
     gen_store_gpr(t0, rt);                                                   \

  reply	other threads:[~2015-09-15 16:46 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-10  9:56 [Qemu-devel] [PATCH v7 00/11] Fix exceptions handling for MIPS, PowerPC, and i386 Pavel Dovgalyuk
2015-07-10  9:56 ` [Qemu-devel] [PATCH v7 01/11] softmmu: add helper function to pass through retaddr Pavel Dovgalyuk
2015-07-10  9:56 ` [Qemu-devel] [PATCH v7 02/11] softmmu: remove now unused functions Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 03/11] cpu-exec: introduce loop exit with restore function Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 04/11] target-mips: improve exception handling Pavel Dovgalyuk
2015-08-13 13:12   ` Leon Alrae
2015-08-17 21:43     ` Aurelien Jarno
2015-08-28  9:08       ` Pavel Dovgaluk
2015-09-15 16:45         ` Leon Alrae [this message]
2015-09-16 12:10           ` Pavel Dovgaluk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 05/11] target-i386: introduce new raise_exception functions Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 06/11] target-i386: exception handling for FPU instructions Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 07/11] target-i386: exception handling for div instructions Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 08/11] target-i386: exception handling for memory helpers Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 09/11] target-i386: exception handling for seg_helper functions Pavel Dovgalyuk
2015-08-18 15:15   ` Richard Henderson
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 10/11] target-i386: exception handling for other helper functions Pavel Dovgalyuk
2015-07-10  9:57 ` [Qemu-devel] [PATCH v7 11/11] target-ppc: exceptions handling in icount mode Pavel Dovgalyuk
2015-09-14 22:55 ` [Qemu-devel] [PATCH v7 00/11] Fix exceptions handling for MIPS, PowerPC, and i386 Richard Henderson
2015-09-15 10:58   ` Aurelien Jarno
2015-09-15 12:06     ` Leon Alrae
2015-09-20 20:31   ` Alexander Graf

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