From: Leon Alrae <leon.alrae@imgtec.com>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH v2 00/22] Do away with TB retranslation
Date: Fri, 18 Sep 2015 15:42:46 +0100 [thread overview]
Message-ID: <55FC22E6.2090300@imgtec.com> (raw)
In-Reply-To: <1442552129-19242-1-git-send-email-rth@twiddle.net>
I've been testing target mips on the tcg-search-2 branch -- I haven't
spotted any obvious regressions and performance gain was visible in some
of my tests. On qemu-system-mips64el the Linux kernel build time went
down from 465m to 305m. And in a virtual memory torture test I can see
slightly above x2 speedup. Nice improvement.
Regards,
Leon
On 18/09/15 05:55, Richard Henderson wrote:
> Version 2, updated based on comments. Notable changes:
>
> (1) Move breakpoint recognition after insn_start. Now we really
> do never have zero insns per TB. Assertions added.
> (2) Comments added.
> (3) Minor tweeks to the encoding, reflected in the comments.
>
> I examined a handfull of test cases, and compiled some sizes:
>
> AVG DATA/TB CODE+DATA EXPAND
> aarch64-test 15.6 17.7
> arm-test 15.9 18.6
> sparc-test 18.9 13.6
> ppc-test 11.4 14.8
> mb-test 12.3 13.5
> coldfire-test 10.8 25.0
> s390 moonbuggy 16.0 17.7
>
> alpha 12.6 12.7
> mips64 31.6 14.8
> ppc64 13.5 16.6
>
> Not surprising that mips is larger, since it requests 3 words
> of ancilliary data, more than anyone else. With less than 20
> bytes per TB on average, I'm not sure that anything else is
> required wrt compression.
>
>
> r~
>
>
> Richard Henderson (22):
> tcg: Rename debug_insn_start to insn_start
> target-*: Unconditionally emit tcg_gen_insn_start
> target-*: Increment num_insns immediately after tcg_gen_insn_start
> target-*: Introduce and use cpu_breakpoint_test
> tcg: Allow extra data to be attached to insn_start
> target-arm: Add condexec state to insn_start
> target-i386: Add cc_op state to insn_start
> target-mips: Add delayed branch state to insn_start
> target-s390x: Add cc_op state to insn_start
> target-sh4: Add flags state to insn_start
> target-cris: Mirror gen_opc_pc into insn_start
> target-sparc: Tidy gen_branch_a interface
> target-sparc: Split out gen_branch_n
> target-sparc: Remove gen_opc_jump_pc
> target-sparc: Add npc state to insn_start
> tcg: Merge cpu_gen_code into tb_gen_code
> target-*: Drop cpu_gen_code define
> tcg: Add TCG_MAX_INSNS
> tcg: Pass data argument to restore_state_to_opc
> tcg: Save insn data and use it in cpu_restore_state_from_tb
> tcg: Remove gen_intermediate_code_pc
> tcg: Remove tcg_gen_code_search_pc
>
> include/exec/exec-all.h | 6 +-
> include/qom/cpu.h | 16 +++
> target-alpha/cpu.h | 1 -
> target-alpha/translate.c | 70 +++---------
> target-arm/cpu.h | 2 +-
> target-arm/translate-a64.c | 62 +++-------
> target-arm/translate.c | 98 +++++-----------
> target-arm/translate.h | 8 +-
> target-cris/cpu.h | 1 -
> target-cris/translate.c | 93 ++++-----------
> target-cris/translate_v10.c | 3 -
> target-i386/cpu.h | 2 +-
> target-i386/translate.c | 106 +++++------------
> target-lm32/cpu.h | 1 -
> target-lm32/translate.c | 83 ++++----------
> target-m68k/cpu.h | 1 -
> target-m68k/translate.c | 82 ++++----------
> target-microblaze/cpu.h | 1 -
> target-microblaze/translate.c | 83 ++++----------
> target-mips/cpu.h | 2 +-
> target-mips/translate.c | 98 +++++-----------
> target-moxie/cpu.h | 1 -
> target-moxie/translate.c | 82 +++++---------
> target-openrisc/cpu.h | 1 -
> target-openrisc/translate.c | 78 +++----------
> target-ppc/cpu.h | 1 -
> target-ppc/translate.c | 72 ++++--------
> target-s390x/cpu.h | 2 +-
> target-s390x/translate.c | 78 ++++---------
> target-sh4/cpu.h | 2 +-
> target-sh4/translate.c | 91 +++++----------
> target-sparc/cpu.h | 2 +-
> target-sparc/translate.c | 185 +++++++++++++-----------------
> target-tilegx/translate.c | 58 +++-------
> target-tricore/translate.c | 59 ++++------
> target-unicore32/translate.c | 83 ++++----------
> target-xtensa/cpu.h | 1 -
> target-xtensa/translate.c | 79 ++++---------
> tcg/tcg-op.h | 52 +++++++--
> tcg/tcg-opc.h | 4 +-
> tcg/tcg.c | 127 +++++++++++----------
> tcg/tcg.h | 16 ++-
> tci.c | 9 --
> translate-all.c | 258 ++++++++++++++++++++++++++----------------
> 44 files changed, 782 insertions(+), 1378 deletions(-)
>
prev parent reply other threads:[~2015-09-18 14:43 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-18 4:55 [Qemu-devel] [PATCH v2 00/22] Do away with TB retranslation Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 01/22] tcg: Rename debug_insn_start to insn_start Richard Henderson
2015-09-21 16:44 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 02/22] target-*: Unconditionally emit tcg_gen_insn_start Richard Henderson
2015-09-21 16:43 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 03/22] target-*: Increment num_insns immediately after tcg_gen_insn_start Richard Henderson
2015-09-18 12:00 ` Peter Maydell
2015-09-21 16:43 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 04/22] target-*: Introduce and use cpu_breakpoint_test Richard Henderson
2015-09-18 10:32 ` Peter Maydell
2015-09-18 12:48 ` Sergey Fedorov
2015-09-18 15:40 ` Richard Henderson
2015-09-18 17:08 ` Sergey Fedorov
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 05/22] tcg: Allow extra data to be attached to insn_start Richard Henderson
2015-09-21 22:24 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 06/22] target-arm: Add condexec state " Richard Henderson
2015-09-21 22:25 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 07/22] target-i386: Add cc_op " Richard Henderson
2015-09-21 22:25 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 08/22] target-mips: Add delayed branch " Richard Henderson
2015-09-21 22:25 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 09/22] target-s390x: Add cc_op " Richard Henderson
2015-09-21 22:25 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 10/22] target-sh4: Add flags " Richard Henderson
2015-09-21 22:26 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 11/22] target-cris: Mirror gen_opc_pc into insn_start Richard Henderson
2015-09-22 16:45 ` Aurelien Jarno
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 12/22] target-sparc: Tidy gen_branch_a interface Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 13/22] target-sparc: Split out gen_branch_n Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 14/22] target-sparc: Remove gen_opc_jump_pc Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 15/22] target-sparc: Add npc state to insn_start Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 16/22] tcg: Merge cpu_gen_code into tb_gen_code Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 17/22] target-*: Drop cpu_gen_code define Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 18/22] tcg: Add TCG_MAX_INSNS Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 19/22] tcg: Pass data argument to restore_state_to_opc Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 20/22] tcg: Save insn data and use it in cpu_restore_state_from_tb Richard Henderson
2015-09-18 13:08 ` Peter Maydell
2015-09-18 16:18 ` Richard Henderson
2015-09-18 22:44 ` Peter Maydell
2015-09-19 2:05 ` Richard Henderson
2015-09-19 21:02 ` Richard Henderson
2015-09-19 21:55 ` Peter Maydell
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 21/22] tcg: Remove gen_intermediate_code_pc Richard Henderson
2015-09-18 4:55 ` [Qemu-devel] [PATCH v2 22/22] tcg: Remove tcg_gen_code_search_pc Richard Henderson
2015-09-18 14:42 ` Leon Alrae [this message]
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