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[83.57.172.113]) by smtp.gmail.com with ESMTPSA id u14sm34451118wrm.51.2020.01.17.10.20.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Jan 2020 10:20:33 -0800 (PST) Subject: Re: [PATCH] target/hppa: Allow, but diagnose, LDCW aligned only mod 4 To: Richard Henderson , Helge Deller , qemu-devel@nongnu.org References: <20200117015322.12953-1-richard.henderson@linaro.org> <7b14c840-0d3f-0c67-06be-81b058c727fb@gmx.de> <08c4bdcb-b07d-eb30-a38d-f27ed6400952@redhat.com> <57d3bd1a-0597-8353-46bd-09dd93347f7b@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: <55a08a64-79ee-48f3-e19b-4f0c2380b09f@redhat.com> Date: Fri, 17 Jan 2020 19:20:32 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2 MIME-Version: 1.0 In-Reply-To: <57d3bd1a-0597-8353-46bd-09dd93347f7b@linaro.org> Content-Language: en-US X-MC-Unique: I7caYlEDNemC2yZtvEwZNw-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dave.anglin@bell.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 1/17/20 6:30 PM, Richard Henderson wrote: > On 1/17/20 6:13 AM, Philippe Mathieu-Daud=C3=A9 wrote: >>>> -=C2=A0=C2=A0=C2=A0 MemOp mop =3D MO_TEUL | MO_ALIGN_16 | a->size; >>>> +=C2=A0=C2=A0=C2=A0 MemOp mop =3D MO_TE | MO_ALIGN | a->size; >> >> >> Hmmm you changed MO_TEUL -> MO_TE, so from MO_32 to MO_8. >> >> Per your description, shouldn't this be MO_TEUL | MO_ALIGN_4? >=20 > The "UL" part is also being added by a->size. This code was written this= way > in preparation for the 64-bit ldc, and the bug was not noticable because = we > don't have that yet. Ah I missed the a->size. So on 32-bit the hw trap doesn't trap on unaligned 16, but traps on=20 unaligned 4. On 64-bit we don't know yet, but IIUC we expect to not trap on unaligned 8. Looking at target/hppa/insns.decode: &ldst t b x disp sp m scale size @ldstx ...... b:5 x:5 sp:2 scale:1 ....... m:1 t:5 &ldst disp= =3D0 @ldim5 ...... b:5 ..... sp:2 ......... t:5 \ &ldst disp=3D%im5_16 x=3D0 scale=3D0 m=3D%ma_to_m ldc 000011 ..... ..... .. . 1 -- 0111 ...... @ldim5=20 size=3D2 ldc 000011 ..... ..... .. . 0 -- 0111 ...... @ldstx=20 size=3D2 We have a->size =3D 2 =3D MO_32 =3D MO_UL. So do you plan to add LDCD from PA2.0 using size=3D3, OK. From "exec/memop.h": * MO_ALIGN supposes the alignment size is the size of a memory access= . * * There are three options: * - unaligned access permitted (MO_UNALN). * - an alignment to the size of an access (MO_ALIGN); Ah so with LDCW we already access a word, so MO_ALIGN -> MO_ALIGN_4. With LDLD we'll have MO_ALIGN -> MO_ALIGN_8. Now "MemOp mop =3D MO_TE | MO_ALIGN | a->size;" makes sense! The power of your decodetree script amazed me again :) Reviewed-by: Philippe Mathieu-Daud=C3=A9