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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-40fb9e1b665sm3417758f8f.27.2025.09.25.08.54.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Sep 2025 08:54:41 -0700 (PDT) Message-ID: <55d6e655-85ac-4a1d-b278-8a5c1f78e417@linaro.org> Date: Thu, 25 Sep 2025 17:54:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 24/36] target/arm: Add key parameter to add_cpreg_to_hashtable Content-Language: en-US To: Peter Maydell Cc: Richard Henderson , qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20250916142238.664316-1-richard.henderson@linaro.org> <20250916142238.664316-25-richard.henderson@linaro.org> <63a29a08-67ea-449f-954b-f62abbc39346@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 25/9/25 16:51, Peter Maydell wrote: > On Thu, 25 Sept 2025 at 12:07, Philippe Mathieu-Daudé wrote: >> >> On 16/9/25 16:22, Richard Henderson wrote: >>> Hoist the computation of key into the caller, where >>> state is a known constant. > >>> @@ -7587,18 +7582,22 @@ static void add_cpreg_to_hashtable_aa64(ARMCPU *cpu, const ARMCPRegInfo *r, >>> */ >>> ARMCPRegInfo nxs_ri = *r; >>> g_autofree char *name = g_strdup_printf("%sNXS", r->name); >>> + uint32_t nxs_key; >>> >>> assert(nxs_ri.crn < 0xf); >>> nxs_ri.crn++; >>> + nxs_key = key + (1 << CP_REG_ARM64_SYSREG_CRN_SHIFT); >> >> This is new but not mentioned. While the CRN bit is know to be 0, >> we usually use '|' to set a bit, not '+'. Preferably using '|': > > I thought so too at first glance -- but what we're doing here > is adding one to crn (there's a comment in this function that's > just outside the context of the diff that explains this). > Since crn is both in the reginfo field and also encoded into > the key, we need to increment both the crn and the bitfield > inside the key. As it happens, at the moment all the regdefs > with ARM_CP_ADD_TLBI_NXS have crn == 8 and so whether we add > or OR makes no difference, but conceptually the addition is > correct. > > I have added a comment > /* Also increment the CRN field inside the key value */ > to hopefully make it a bit clearer that we're doing an > increment operation here. Thanks!