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From: Miles Glenn <milesg@linux.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org,
	Daniel Henrique Barboza <danielhb413@gmail.com>,
	Richard Henderson <richard.henderson@linaro.org>,
	Chinmay Rath <rathc@linux.ibm.com>
Subject: Re: [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit
Date: Tue, 21 May 2024 10:44:39 -0500	[thread overview]
Message-ID: <55ea46977ffce8b363394c00392052cc46280d6d.camel@linux.ibm.com> (raw)
In-Reply-To: <20240521013029.30082-5-npiggin@gmail.com>

Reviewed-by: Glenn Miles <milesg@linux.ibm.com>

Thanks,

Glenn

On Tue, 2024-05-21 at 11:30 +1000, Nicholas Piggin wrote:
> The DECAR SPR is 32-bits width.
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
>  target/ppc/cpu_init.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index ee01415c32..927721d49a 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -792,7 +792,7 @@ static void register_BookE_sprs(CPUPPCState *env,
> uint64_t ivor_mask)
>                   0x00000000);
>      spr_register(env, SPR_BOOKE_DECAR, "DECAR",
>                   SPR_NOACCESS, SPR_NOACCESS,
> -                 SPR_NOACCESS, &spr_write_generic,
> +                 SPR_NOACCESS, &spr_write_generic32,
>                   0x00000000);
>      /* SPRGs */
>      spr_register(env, SPR_USPRG0, "USPRG0",



  reply	other threads:[~2024-05-21 15:45 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-21  1:30 [PATCH v2 00/12] target/ppc: Various TCG emulation patches Nicholas Piggin
2024-05-21  1:30 ` [PATCH v2 01/12] target/ppc: Make checkstop actually stop the system Nicholas Piggin
2024-05-21 15:32   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 02/12] target/ppc: improve checkstop logging Nicholas Piggin
2024-05-21 15:37   ` Miles Glenn
2024-05-21 17:29   ` Richard Henderson
2025-04-29  6:49   ` Philippe Mathieu-Daudé
2024-05-21  1:30 ` [PATCH v2 03/12] target/ppc: Implement attn instruction on BookS 64-bit processors Nicholas Piggin
2024-05-21 15:41   ` Miles Glenn
2024-05-22  1:30     ` Nicholas Piggin
2024-05-21 17:34   ` Richard Henderson
2024-05-22  1:32     ` Nicholas Piggin
2024-05-21  1:30 ` [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit Nicholas Piggin
2024-05-21 15:44   ` Miles Glenn [this message]
2024-05-21  1:30 ` [PATCH v2 05/12] target/ppc: Wire up BookE ATB registers for e500 family Nicholas Piggin
2024-05-21  1:30 ` [PATCH v2 06/12] target/ppc: Add PPR32 SPR Nicholas Piggin
2024-05-21 15:52   ` Miles Glenn
2024-05-21 17:40   ` Richard Henderson
2024-05-22  1:43     ` Nicholas Piggin
2024-05-21  1:30 ` [PATCH v2 07/12] target/ppc: add helper to write per-LPAR SPRs Nicholas Piggin
2024-05-21 16:50   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 08/12] target/ppc: Add SMT support to simple SPRs Nicholas Piggin
2024-05-21 15:56   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 09/12] target/ppc: Add SMT support to PTCR SPR Nicholas Piggin
2024-05-21 16:02   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 10/12] target/ppc: Implement LDBAR, TTR SPRs Nicholas Piggin
2024-05-21 16:41   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 11/12] target/ppc: Implement SPRC/SPRD SPRs Nicholas Piggin
2024-05-21 16:37   ` Miles Glenn
2024-05-21  1:30 ` [PATCH v2 12/12] target/ppc: add SMT support to msgsnd broadcast Nicholas Piggin
2024-05-21 17:07   ` Miles Glenn

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