* [Qemu-devel] [PATCH] vmxnet3: Support reading IMR registers on bar0
@ 2015-09-21 14:09 Shmulik Ladkani
2015-09-22 8:16 ` Dmitry Fleytman
2015-09-24 4:41 ` Jason Wang
0 siblings, 2 replies; 3+ messages in thread
From: Shmulik Ladkani @ 2015-09-21 14:09 UTC (permalink / raw)
To: qemu-devel, Dmitry Fleytman, Jason Wang
Cc: idan.brown, Dana Rubin, Shmulik Ladkani
Instead of asserting, return the actual IMR register value.
This is aligned with what's returned on ESXi.
Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
Tested-by: Dana Rubin <dana.rubin@ravellosystems.com>
---
hw/net/vmxnet3.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index 04159c8..97f19dc 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -1165,9 +1165,13 @@ vmxnet3_io_bar0_write(void *opaque, hwaddr addr,
static uint64_t
vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
{
+ VMXNET3State *s = opaque;
+
if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
- g_assert_not_reached();
+ int l = VMW_MULTIREG_IDX_BY_ADDR(addr, VMXNET3_REG_IMR,
+ VMXNET3_REG_ALIGN);
+ return s->interrupt_states[l].is_masked;
}
VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] vmxnet3: Support reading IMR registers on bar0
2015-09-21 14:09 [Qemu-devel] [PATCH] vmxnet3: Support reading IMR registers on bar0 Shmulik Ladkani
@ 2015-09-22 8:16 ` Dmitry Fleytman
2015-09-24 4:41 ` Jason Wang
1 sibling, 0 replies; 3+ messages in thread
From: Dmitry Fleytman @ 2015-09-22 8:16 UTC (permalink / raw)
To: Shmulik Ladkani; +Cc: Jason Wang, Idan Brown, qemu-devel, Dana Rubin
> On Sep 21, 2015, at 17:09 PM, Shmulik Ladkani <shmulik.ladkani@ravellosystems.com> wrote:
>
> Instead of asserting, return the actual IMR register value.
> This is aligned with what's returned on ESXi.
>
> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
> Tested-by: Dana Rubin <dana.rubin@ravellosystems.com>
>
ACK.
> ---
> hw/net/vmxnet3.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
> index 04159c8..97f19dc 100644
> --- a/hw/net/vmxnet3.c
> +++ b/hw/net/vmxnet3.c
> @@ -1165,9 +1165,13 @@ vmxnet3_io_bar0_write(void *opaque, hwaddr addr,
> static uint64_t
> vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
> {
> + VMXNET3State *s = opaque;
> +
> if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
> VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
> - g_assert_not_reached();
> + int l = VMW_MULTIREG_IDX_BY_ADDR(addr, VMXNET3_REG_IMR,
> + VMXNET3_REG_ALIGN);
> + return s->interrupt_states[l].is_masked;
> }
>
> VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] vmxnet3: Support reading IMR registers on bar0
2015-09-21 14:09 [Qemu-devel] [PATCH] vmxnet3: Support reading IMR registers on bar0 Shmulik Ladkani
2015-09-22 8:16 ` Dmitry Fleytman
@ 2015-09-24 4:41 ` Jason Wang
1 sibling, 0 replies; 3+ messages in thread
From: Jason Wang @ 2015-09-24 4:41 UTC (permalink / raw)
To: Shmulik Ladkani, qemu-devel, Dmitry Fleytman; +Cc: idan.brown, Dana Rubin
On 09/21/2015 10:09 PM, Shmulik Ladkani wrote:
> Instead of asserting, return the actual IMR register value.
> This is aligned with what's returned on ESXi.
>
> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
> Tested-by: Dana Rubin <dana.rubin@ravellosystems.com>
>
> ---
> hw/net/vmxnet3.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
> index 04159c8..97f19dc 100644
> --- a/hw/net/vmxnet3.c
> +++ b/hw/net/vmxnet3.c
> @@ -1165,9 +1165,13 @@ vmxnet3_io_bar0_write(void *opaque, hwaddr addr,
> static uint64_t
> vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
> {
> + VMXNET3State *s = opaque;
> +
> if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
> VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
> - g_assert_not_reached();
> + int l = VMW_MULTIREG_IDX_BY_ADDR(addr, VMXNET3_REG_IMR,
> + VMXNET3_REG_ALIGN);
> + return s->interrupt_states[l].is_masked;
> }
>
> VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
Applied in https://github.com/jasowang/qemu/commits/net
Thanks.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2015-09-24 4:41 UTC | newest]
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2015-09-22 8:16 ` Dmitry Fleytman
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