From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: peter.maydell@linaro.org, alex.bennee@linaro.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3 20/25] tcg: Save insn data and use it in cpu_restore_state_from_tb
Date: Fri, 25 Sep 2015 16:05:00 -0700 [thread overview]
Message-ID: <5605D31C.3080600@twiddle.net> (raw)
In-Reply-To: <20150925211036.GA20144@aurel32.net>
On 09/25/2015 02:10 PM, Aurelien Jarno wrote:
>> + if (more)
>> + byte |= 0x80;
>
> You are missing braces here.
Gah. I thought I fixed that...
> Given we save both the host and the guest PC in this structure, one
> obvious optimization would be to skip saving data for host instructions
> which can not generate exception. It means that all the TCG ops in this
> instruction do not generate exceptions either. We can easily test that
> for all TCG instructions except all by looking at the
> TCG_OPF_SIDE_EFFECTS flag. For the call op, we have to look at the
> TCG_CALL_NO_SIDE_EFFECTS flag, even if it doesn't necessary means the
> helper might generate exception.
>
> That should significantly save space on load/store architectures. That
> said we can probably do that in a latter time.
Yes, Alex Bennee mentioned this during round 1. I decided to not try to do
that all at once.
When we do get there, we also have to add an additional column for icount.
It's currently inferred that each entry is 1 insn. This will expand the size
of the table in any case that every insn might raise an exception, but I expect
the normal case to be a slight decrease.
r~
next prev parent reply other threads:[~2015-09-25 23:05 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-22 20:24 [Qemu-devel] [PATCH v3 00/25] Do away with TB retranslation Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 01/25] tcg: Rename debug_insn_start to insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 02/25] target-*: Unconditionally emit tcg_gen_insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 03/25] target-*: Increment num_insns immediately after tcg_gen_insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 04/25] target-*: Introduce and use cpu_breakpoint_test Richard Henderson
2015-09-23 19:19 ` Peter Maydell
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 05/25] tcg: Allow extra data to be attached to insn_start Richard Henderson
2015-09-23 14:55 ` Kevin O'Connor
2015-09-23 16:37 ` Richard Henderson
2015-09-23 16:38 ` Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 06/25] target-arm: Add condexec state " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 07/25] target-i386: Add cc_op " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 08/25] target-mips: Add delayed branch " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 09/25] target-s390x: Add cc_op " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 10/25] target-sh4: Add flags " Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 11/25] target-cris: Mirror gen_opc_pc into insn_start Richard Henderson
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 12/25] target-sparc: Tidy gen_branch_a interface Richard Henderson
2015-09-22 21:23 ` Aurelien Jarno
2015-09-24 19:42 ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 13/25] target-sparc: Split out gen_branch_n Richard Henderson
2015-09-24 19:42 ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 14/25] target-sparc: Remove gen_opc_jump_pc Richard Henderson
2015-09-24 19:42 ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 15/25] target-sparc: Add npc state to insn_start Richard Henderson
2015-09-24 19:42 ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 16/25] tcg: Merge cpu_gen_code into tb_gen_code Richard Henderson
2015-09-24 19:48 ` Aurelien Jarno
2015-09-22 20:24 ` [Qemu-devel] [PATCH v3 17/25] target-*: Drop cpu_gen_code define Richard Henderson
2015-09-24 19:49 ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 18/25] tcg: Add TCG_MAX_INSNS Richard Henderson
2015-09-24 20:02 ` Aurelien Jarno
2015-09-24 20:43 ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 19/25] tcg: Pass data argument to restore_state_to_opc Richard Henderson
2015-09-24 20:11 ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 20/25] tcg: Save insn data and use it in cpu_restore_state_from_tb Richard Henderson
2015-09-23 19:20 ` Peter Maydell
2015-09-25 21:10 ` Aurelien Jarno
2015-09-25 23:05 ` Richard Henderson [this message]
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 21/25] tcg: Remove gen_intermediate_code_pc Richard Henderson
2015-09-25 21:11 ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 22/25] tcg: Remove tcg_gen_code_search_pc Richard Henderson
2015-09-25 21:11 ` Aurelien Jarno
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 23/25] tcg: Emit prologue to the beginning of code_gen_buffer Richard Henderson
2015-09-23 19:28 ` Peter Maydell
2015-09-23 19:39 ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 24/25] tcg: Allocate a guard page after code_gen_buffer Richard Henderson
2015-09-23 19:39 ` Peter Maydell
2015-09-23 20:00 ` Richard Henderson
2015-09-23 20:37 ` Peter Maydell
2015-09-23 22:12 ` Richard Henderson
2015-09-22 20:25 ` [Qemu-devel] [PATCH v3 25/25] tcg: Check for overflow via highwater mark Richard Henderson
2015-09-23 19:42 ` Peter Maydell
2015-09-23 20:01 ` Richard Henderson
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