From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52067) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhSmy-0004eF-94 for qemu-devel@nongnu.org; Wed, 30 Sep 2015 21:36:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZhSmv-00048t-3K for qemu-devel@nongnu.org; Wed, 30 Sep 2015 21:36:04 -0400 Received: from mail-pa0-x22b.google.com ([2607:f8b0:400e:c03::22b]:33937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhSmu-00048o-U2 for qemu-devel@nongnu.org; Wed, 30 Sep 2015 21:36:01 -0400 Received: by padhy16 with SMTP id hy16so57163953pad.1 for ; Wed, 30 Sep 2015 18:36:00 -0700 (PDT) Sender: Richard Henderson References: <1443558863-26132-1-git-send-email-ehabkost@redhat.com> <1443558863-26132-3-git-send-email-ehabkost@redhat.com> From: Richard Henderson Message-ID: <560C8DF8.7020700@twiddle.net> Date: Thu, 1 Oct 2015 11:35:52 +1000 MIME-Version: 1.0 In-Reply-To: <1443558863-26132-3-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] target-i386: Don't left shift negative constant List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost , qemu-devel@nongnu.org Cc: Paolo Bonzini On 09/30/2015 06:34 AM, Eduardo Habkost wrote: > Left shift of negative values is undefined behavior. Detected by clang: > qemu/target-i386/translate.c:2423:26: runtime error: > left shift of negative value -8 > > This changes the code to reverse the sign after the left shift. > > Signed-off-by: Eduardo Habkost > --- > target-i386/translate.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target-i386/translate.c b/target-i386/translate.c > index 8b35de1..cc59b7e 100644 > --- a/target-i386/translate.c > +++ b/target-i386/translate.c > @@ -2420,7 +2420,7 @@ static void gen_pusha(DisasContext *s) > { > int i; > gen_op_movl_A0_reg(R_ESP); > - gen_op_addl_A0_im(-8 << s->dflag); > + gen_op_addl_A0_im(-(8 << s->dflag)); Better as -8U << s->d_flag? > if (!s->ss32) > tcg_gen_ext16u_tl(cpu_A0, cpu_A0); > tcg_gen_mov_tl(cpu_T[1], cpu_A0); >