* [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu exception
@ 2015-10-02 15:34 Yongbok Kim
2015-10-06 13:10 ` Leon Alrae
0 siblings, 1 reply; 2+ messages in thread
From: Yongbok Kim @ 2015-10-02 15:34 UTC (permalink / raw)
To: qemu-devel; +Cc: leon.alrae, aurelien
Correct updating XContext.Region field on mmu exceptions.
If Config3.CTXTC = 0 then the R filed of XContext has to be updated
with the value of bits 63..62 of the virtual address upon a TLB
exception.
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
---
target-mips/helper.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 01c4461..8ffc990 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -294,7 +294,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
#if defined(TARGET_MIPS64)
env->CP0_EntryHi &= env->SEGMask;
env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) |
- ((address & 0xC00000000000ULL) >> (55 - env->SEGBITS)) |
+ (((address >> 62) & 0x3) << (env->SEGBITS - 9)) |
((address & ((1ULL << env->SEGBITS) - 1) & 0xFFFFFFFFFFFFE000ULL) >> 9);
#endif
cs->exception_index = exception;
--
1.7.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu exception
2015-10-02 15:34 [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu exception Yongbok Kim
@ 2015-10-06 13:10 ` Leon Alrae
0 siblings, 0 replies; 2+ messages in thread
From: Leon Alrae @ 2015-10-06 13:10 UTC (permalink / raw)
To: Yongbok Kim, qemu-devel; +Cc: aurelien
On 02/10/15 16:34, Yongbok Kim wrote:
> Correct updating XContext.Region field on mmu exceptions.
> If Config3.CTXTC = 0 then the R filed of XContext has to be updated
s/filed/field
> with the value of bits 63..62 of the virtual address upon a TLB
> exception.
>
> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
> ---
> target-mips/helper.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index 01c4461..8ffc990 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -294,7 +294,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address,
> #if defined(TARGET_MIPS64)
> env->CP0_EntryHi &= env->SEGMask;
> env->CP0_XContext = (env->CP0_XContext & ((~0ULL) << (env->SEGBITS - 7))) |
> - ((address & 0xC00000000000ULL) >> (55 - env->SEGBITS)) |
> + (((address >> 62) & 0x3) << (env->SEGBITS - 9)) |
Did you consider using extract64?
> ((address & ((1ULL << env->SEGBITS) - 1) & 0xFFFFFFFFFFFFE000ULL) >> 9);
Care to fix this >80 chars line while you are on this? :)
Thanks,
Leon
> #endif
> cs->exception_index = exception;
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2015-10-02 15:34 [Qemu-devel] [PATCH] target-mips: fix updating XContext on mmu exception Yongbok Kim
2015-10-06 13:10 ` Leon Alrae
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