From: Leon Alrae <leon.alrae@imgtec.com>
To: Yongbok Kim <yongbok.kim@imgtec.com>, qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: Re: [Qemu-devel] [PATCH] target-mips: Add SIGRIE instruction
Date: Tue, 6 Oct 2015 14:38:52 +0100 [thread overview]
Message-ID: <5613CEEC.804@imgtec.com> (raw)
In-Reply-To: <1444037606-15202-1-git-send-email-yongbok.kim@imgtec.com>
On 05/10/15 10:33, Yongbok Kim wrote:
> @@ -18958,6 +18964,10 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
> check_insn_opc_removed(ctx, ISA_MIPS32R6);
> gen_trap(ctx, op1, rs, -1, imm);
> break;
> + case OPC_SIGRIE:
> + check_insn(ctx, ISA_MIPS32R6);
> + generate_exception_err(ctx, EXCP_RI, extract32(ctx->opcode, 0, 16));
Code field is passed as the error_code, but it isn't used later anywhere
and just causes confusion. MIPS BIS document doesn't require any
specific behaviour related to this field, thus in QEMU we should ignore
it and just call generate_exception_end(ctx, EXCP_RI) here.
Leon
prev parent reply other threads:[~2015-10-06 13:39 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-05 9:33 [Qemu-devel] [PATCH] target-mips: Add SIGRIE instruction Yongbok Kim
2015-10-06 13:38 ` Leon Alrae [this message]
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