From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57532) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zjun0-0005y4-2q for qemu-devel@nongnu.org; Wed, 07 Oct 2015 15:54:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zjumv-00024U-2v for qemu-devel@nongnu.org; Wed, 07 Oct 2015 15:54:14 -0400 Received: from mail-pa0-x22a.google.com ([2607:f8b0:400e:c03::22a]:36796) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zjumu-00024K-TD for qemu-devel@nongnu.org; Wed, 07 Oct 2015 15:54:09 -0400 Received: by pablk4 with SMTP id lk4so30162331pab.3 for ; Wed, 07 Oct 2015 12:54:08 -0700 (PDT) Sender: Richard Henderson References: <1443788657-14537-1-git-send-email-james.hogan@imgtec.com> <1443788657-14537-7-git-send-email-james.hogan@imgtec.com> <5614E9F6.8060102@twiddle.net> <20151007103440.GF29862@jhogan-linux.le.imgtec.org> From: Richard Henderson Message-ID: <56157859.4070306@twiddle.net> Date: Thu, 8 Oct 2015 06:54:01 +1100 MIME-Version: 1.0 In-Reply-To: <20151007103440.GF29862@jhogan-linux.le.imgtec.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v3 6/6] tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: Leon Alrae , qemu-devel@nongnu.org, Aurelien Jarno On 10/07/2015 09:34 PM, James Hogan wrote: >>> { INDEX_op_brcond_i32, { "rZ", "rZ" } }, >>> +#if !use_mips32r6_instructions >>> { INDEX_op_movcond_i32, { "r", "rZ", "rZ", "rZ", "0" } }, >>> +#else >>> + { INDEX_op_movcond_i32, { "r", "rZ", "rZ", "rZ", "rZ" } }, >>> +#endif >> >> >> The only thing I'd change is preferring positive tests to negative ones. So >> swap the order of these lines, and the sense of the #if. > > No problem. Shall I do a full resend for that, or can it be fixed up by > whoever applies? No resend needed. I'll fix it when applying to my tcg queue. r~