From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56703) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkbQp-0007DN-Gd for qemu-devel@nongnu.org; Fri, 09 Oct 2015 13:26:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZkbQY-0004iB-Ea for qemu-devel@nongnu.org; Fri, 09 Oct 2015 13:26:11 -0400 Received: from mail-qg0-x232.google.com ([2607:f8b0:400d:c04::232]:35017) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZkbQY-0004hq-4p for qemu-devel@nongnu.org; Fri, 09 Oct 2015 13:25:54 -0400 Received: by qgt47 with SMTP id 47so74305290qgt.2 for ; Fri, 09 Oct 2015 10:25:53 -0700 (PDT) Message-ID: <5617F8A0.2050300@gmail.com> Date: Fri, 09 Oct 2015 13:25:52 -0400 From: Michael Davidsaver MIME-Version: 1.0 References: <1b09df0b1659aefda410242d9976db61eb099b32.1444318183.git.mdavidsaver@gmail.com> In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] armv7-m: exit on external reset request List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: QEMU Developers On 10/09/2015 12:59 PM, Peter Maydell wrote: > On 8 October 2015 at 16:40, Michael Davidsaver wrote: >> ... >> case 0xd0c: /* Application Interrupt/Reset Control. */ >> if ((value >> 16) == 0x05fa) { >> + if (value & 4) { >> + qemu_system_reset_request(); >> + } ... > > Strictly speaking what this bit does is assert a signal out of > the CPU to some external power management or similar device > in the SoC, which then is responsible for doing the reset. > So just calling qemu_system_reset_request() here is a bit of > a shortcut. But maybe it's a pragmatic shortcut? I'm not sure what you mean by shortcut? Most targets have some way to trigger qemu to exit. I actually compiled a list recently (see below). I couldn't find one for the lm3s6965evb machine, thus this patch. FYI, one of my interests in QEMU is to automate testing of low level code. Being able to cause the qemu process to exit when the tests complete is quite helpful (simplifies the test runner) qemu_system_reset_request() highbank.c -> register write integratorcp.c -> register write musicpal.c -> register write (musicpal board) omap1.c -> register write omap2.c -> register write pc.c -> register write (port 92) pckbd.c -> register write (two different registers) lpc_ich9.c -> register write arm_sysctl.c -> register write (vexpress only or board_ids 0x100, 0x178, 0x182 only, ) cuda.c -> register write slavio_misc.c -> register write zynq_slcr.c -> register write (xilinx-zynq-a9 board) apb.c -> register write bonito.c -> register write piix.c -> register write mpc8544_guts.c -> register write ppc.c -> e500 only ppce500_irq_init() w/ PPCE500_INPUT_MCK ppc405_uc.c -> store_40x_dbcr0() spapr_hcall.c -> KVM only spapr_rtas.c -> register RTAS_SYSTEM_REBOOT etraxfs_timer.c -> watchdog timer expire m48t59.c -> watchdog timer expire milkymist-sysctl.c -> register write pxa2xx_timer.c -> watchdog timer expire (bsp option) watchdog.c -> generic watchdog timer expire xtfpga.c -> register write cpu_exit() pc.c -> DMA_init prep.c -> DMA_init (broken) spapr_rtas.c -> register RTAS_STOP_SELF