qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] armv7-m: exit on external reset request
Date: Fri, 09 Oct 2015 14:51:25 -0400	[thread overview]
Message-ID: <56180CAD.50901@gmail.com> (raw)
In-Reply-To: <CAPokK=pYEwWsN5JSfjVxa2Yi_RWeKrzi9Wu6rHtJ49HdWtnBQQ@mail.gmail.com>

On 10/09/2015 02:18 PM, Peter Crosthwaite wrote:
> On Fri, Oct 9, 2015 at 10:25 AM, Michael Davidsaver
> <mdavidsaver@gmail.com> wrote:
>>
>>
>> On 10/09/2015 12:59 PM, Peter Maydell wrote:
>>> On 8 October 2015 at 16:40, Michael Davidsaver <mdavidsaver@gmail.com> wrote:
>>>> ...
>>>>      case 0xd0c: /* Application Interrupt/Reset Control.  */
>>>>          if ((value >> 16) == 0x05fa) {
>>>> +            if (value & 4) {
>>>> +                qemu_system_reset_request();
>>>> +            }
>> ...
>>>
>>> Strictly speaking what this bit does is assert a signal out of
>>> the CPU to some external power management or similar device
>>> in the SoC, which then is responsible for doing the reset.
>>> So just calling qemu_system_reset_request() here is a bit of
>>> a shortcut. But maybe it's a pragmatic shortcut?
>>
>> I'm not sure what you mean by shortcut?  Most targets have some way to trigger qemu to exit.  I actually compiled a list recently (see below).  I couldn't find one for the lm3s6965evb machine, thus this patch.
>>
> 
...
> I think it would be better for SoC (or board) level to
> install the GPIO handler to do the reset. As far as target-arm is
> concerned this is then just a GPIO.

I don't think I'm well versed enough in qemu lingo to parse this sentence :)
Are you concerned about adding this function to AIRCR (which would effect every armv7-m board),
or about directly calling qemu_system_reset_request() in armv7m_nvic.c?


> We should check the lm3s docs to see what the implementation of this
> signal is.

To quote page 129 of http://www.ti.com/lit/ds/symlink/lm3s6965.pdf

> System Reset Request
> Value Description
> 0
>  No effect.
> 1
>  Resets the core and all on-chip peripherals except the Debug
> interface.
> This bit is automatically cleared during the reset of the core and reads
> as 0.

There is also mention of a board specific watchdog timer.

I also looked at the TI MSP432P4xx (I have one), which give a similar definition for this bit (along with a dozen board specific ways to do different reset levels...)

  reply	other threads:[~2015-10-09 18:52 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-08 15:40 [Qemu-devel] [PATCH] Exit on reset for armv7-m Michael Davidsaver
2015-10-08 15:40 ` [Qemu-devel] [PATCH] armv7-m: exit on external reset request Michael Davidsaver
2015-10-09 16:59   ` Peter Maydell
2015-10-09 17:25     ` Michael Davidsaver
2015-10-09 18:18       ` Peter Crosthwaite
2015-10-09 18:51         ` Michael Davidsaver [this message]
2015-10-10 14:35           ` Michael Davidsaver
2015-10-10 18:54             ` [Qemu-devel] [PATCH v2] " Michael Davidsaver
2015-10-11 15:06               ` Peter Crosthwaite
2015-10-12  3:36                 ` [Qemu-devel] [PATCH v3 1/3] armv7-m: Return DeviceState* from armv7m_init() Michael Davidsaver
2015-10-30 21:15                   ` Peter Crosthwaite
2015-10-30 21:20                     ` Peter Crosthwaite
2015-10-30 21:35                       ` Peter Maydell
2015-10-12  3:36                 ` [Qemu-devel] [PATCH v3 2/3] armv7-m: Implement SYSRESETREQ Michael Davidsaver
2015-10-30 21:16                   ` Peter Crosthwaite
2015-10-12  3:36                 ` [Qemu-devel] [PATCH v3 3/3] stellaris: exit on external reset request Michael Davidsaver
2015-10-30 21:13                   ` Peter Crosthwaite
2015-10-08 20:09 ` [Qemu-devel] [PATCH] Exit on reset for armv7-m Peter Crosthwaite
2015-10-09  1:24   ` Michael Davidsaver
2015-10-09  4:21     ` Peter Crosthwaite

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=56180CAD.50901@gmail.com \
    --to=mdavidsaver@gmail.com \
    --cc=crosthwaitepeter@gmail.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).