From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32963) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZlnDi-0007Ps-5D for qemu-devel@nongnu.org; Mon, 12 Oct 2015 20:13:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZlnDe-0008NB-VA for qemu-devel@nongnu.org; Mon, 12 Oct 2015 20:13:34 -0400 Received: from mail-pa0-x22c.google.com ([2607:f8b0:400e:c03::22c]:36209) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZlnDe-0008N7-Oz for qemu-devel@nongnu.org; Mon, 12 Oct 2015 20:13:30 -0400 Received: by pacex6 with SMTP id ex6so2128880pac.3 for ; Mon, 12 Oct 2015 17:13:30 -0700 (PDT) Sender: Richard Henderson References: <1444211031-11624-1-git-send-email-rth@twiddle.net> <1444211031-11624-5-git-send-email-rth@twiddle.net> <5617C252.6070104@gmail.com> From: Richard Henderson Message-ID: <561C4CA4.9010506@twiddle.net> Date: Tue, 13 Oct 2015 11:13:24 +1100 MIME-Version: 1.0 In-Reply-To: <5617C252.6070104@gmail.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PULL 04/26] target-*: Introduce and use cpu_breakpoint_test List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Fedorov , qemu-devel@nongnu.org Cc: peter.maydell@linaro.org On 10/10/2015 12:34 AM, Sergey Fedorov wrote: >> @@ -2936,6 +2927,10 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu, >> tcg_gen_insn_start(ctx.pc); >> num_insns++; >> >> + if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) { >> + gen_excp(&ctx, EXCP_DEBUG, 0); >> + break; >> + } > > Actually, control logic has changed here. The old code used a break > statement to exit from QTAILQ_FOREACH loop and continue with instruction > translation thus translating at least one instruction. The break > statement in the new code makes exit from the translation loop itself, > effectively producing zero-length TB which won't get invalidated when > clearing the breakpoint. Seems like we should remove the break statement > here and in similar cases below, right? Why do you believe that a zero-length TB won't be cleared? The TB still has a start address, which is contained within a given page, which is invalidated. Some target-*/translate.c takes care to advance the PC, but I believe that this is only required when the breakpoint instruction *itself* could span a page boundary. I.e. the TB needs to be marked to span two pages. This situation can never be true for many RISC targets. We did discuss this exact situation during review of the patch set, though it's probably true that there are outstanding errors in some translators. r~