From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59112) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Znwur-0000Of-6S for qemu-devel@nongnu.org; Sun, 18 Oct 2015 18:59:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Znwuo-00036z-1U for qemu-devel@nongnu.org; Sun, 18 Oct 2015 18:59:01 -0400 Received: from mail-qk0-x235.google.com ([2607:f8b0:400d:c09::235]:33108) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Znwun-00036v-Sf for qemu-devel@nongnu.org; Sun, 18 Oct 2015 18:58:57 -0400 Received: by qkcy65 with SMTP id y65so8060091qkc.0 for ; Sun, 18 Oct 2015 15:58:57 -0700 (PDT) Sender: Richard Henderson References: <1445012619-23772-1-git-send-email-ehabkost@redhat.com> <1445012619-23772-4-git-send-email-ehabkost@redhat.com> From: Richard Henderson Message-ID: <5624242D.7010006@twiddle.net> Date: Sun, 18 Oct 2015 12:58:53 -1000 MIME-Version: 1.0 In-Reply-To: <1445012619-23772-4-git-send-email-ehabkost@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 3/9] target-i386: Ensure bit 10 on DR7 is never cleared List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost , qemu-devel@nongnu.org, Paolo Bonzini On 10/16/2015 06:23 AM, Eduardo Habkost wrote: > Bit 10 of DR7 is documented as always set to 1, so ensure that's > always the case. > > Signed-off-by: Eduardo Habkost > --- > target-i386/bpt_helper.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c > index 23ce828..493deba 100644 > --- a/target-i386/bpt_helper.c > +++ b/target-i386/bpt_helper.c > @@ -113,6 +113,8 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7) > hw_breakpoint_insert(env, i); > } > } > + > + env->dr[7] |= DR7_FIXED_1; Better to do this to new_dr7, above the xor test with old_dr7, so that we still pass the xor test. r~