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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de,
	david@gibson.dropbear.id.au, cormac@c-obrien.org
Subject: Re: [Qemu-devel] [PATCH 02/13] PPC: Fix lsxw bounds checks
Date: Tue, 03 Nov 2015 22:13:38 +0000	[thread overview]
Message-ID: <56393192.2020305@ilande.co.uk> (raw)
In-Reply-To: <56392119.50200@redhat.com>

On 03/11/15 21:03, Thomas Huth wrote:

> On 03/11/15 20:21, Mark Cave-Ayland wrote:
>> On 03/11/15 15:23, Thomas Huth wrote:
>>
>>> On 23/10/15 15:56, Mark Cave-Ayland wrote:
>>>> From: Alexander Graf <agraf@suse.de>
>>>>
>>>> The lsxw instruction checks whether the desired string actually fits
>>>> into all defined registers. Unfortunately it does the calculation wrong,
>>>> resulting in illegal instruction traps for loads that really should fit.
>>>
>>> s/lsxw/lswx/ in the above text and in the title ... but I guess this
>>> could also be done when this patch gets picked up.
>>>
>>>> Fix it up, making Mac OS happier.
>>>>
>>>> Signed-off-by: Alexander Graf <agraf@suse.de>
>>>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>>>> ---
>>>>  target-ppc/mem_helper.c |    5 +++--
>>>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
>>>> index 6d37dae..7e1f234 100644
>>>> --- a/target-ppc/mem_helper.c
>>>> +++ b/target-ppc/mem_helper.c
>>>> @@ -100,8 +100,9 @@ void helper_lswx(CPUPPCState *env, target_ulong addr, uint32_t reg,
>>>>                   uint32_t ra, uint32_t rb)
>>>>  {
>>>>      if (likely(xer_bc != 0)) {
>>>> -        if (unlikely((ra != 0 && reg < ra && (reg + xer_bc) > ra) ||
>>>> -                     (reg < rb && (reg + xer_bc) > rb))) {
>>>> +        int num_used_regs = (xer_bc + 3) / 4;
>>>> +        if (unlikely((ra != 0 && reg < ra && (reg + num_used_regs) > ra) ||
>>>> +                     (reg < rb && (reg + num_used_regs) > rb))) {
>>>>              helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
>>>>                                         POWERPC_EXCP_INVAL |
>>>>                                         POWERPC_EXCP_INVAL_LSWX);
>>>
>>> The calculation of num_used_regs looks fine to me ... but is the
>>> remaining part of the condition really right already?
>>>
>>> According to the PowerISA:
>>>
>>>  If RA or RB is in the range of registers to be loaded,
>>>  including the case in which RA=0, the instruction is
>>>  treated as if the instruction form were invalid. If RT=RA
>>>  or RT=RB, the instruction form is invalid.
>>>
>>> So I wonder whether the check for "ra != 0" is really necessary here?
>>> Also, shouldn't the code rather check for "reg <= ra" instead of "reg <
>>> ra"? And "reg <= rb", too, of course?
>>>
>>> Also this code seems to completely ignore the case of the register
>>> wrap-around, where the sequence of registers jumps back to r0 ...
>>>
>>> So I'm basically fine with the num_used_regs fix for now, but I think
>>> this needs a big "FIXME" comment so that the remaining issues get
>>> cleaned up later?
>>
>> This was one of Alex's patches that was originally queued for ppc-next
>> before being dropped for missing the SoB, so I was expecting review to
>> find issues with other patches in the set rather than this one...
>>
>> Having said that, I'm not sure whether this was deliberate for
>> compatibility reasons or just an oversight. Unless David has any ideas
>> it might be that we have to wait for Alex to return before this series
>> can be included, but thanks for the review anyhow :)
> 
> Well, as I said, I'm basically fine with the patch, since it fixes one
> bug and the fix itself also looks fine. It's just that the surrounding
> code looks like it contains some more bugs... but these could also be
> fixed with a later patch, I guess.

Okay, great. I've fixed the comments in my local branch and will
resubmit on-list if David is happy with the changes.


Many thanks,

Mark.

  reply	other threads:[~2015-11-03 22:14 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-23 13:56 [Qemu-devel] [PATCH 00/13] Mac OS 9 compatibility improvements (upstream rework) Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 01/13] PPC: Allow Rc bit to be set on mtspr Mark Cave-Ayland
2015-11-03  8:22   ` Thomas Huth
2015-11-04  2:59   ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 02/13] PPC: Fix lsxw bounds checks Mark Cave-Ayland
2015-11-03 15:23   ` Thomas Huth
2015-11-03 19:21     ` Mark Cave-Ayland
2015-11-03 21:03       ` Thomas Huth
2015-11-03 22:13         ` Mark Cave-Ayland [this message]
2015-11-04  3:01         ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 03/13] PPC: mac99: Always add USB controller Mark Cave-Ayland
2015-11-03 15:30   ` Thomas Huth
2015-11-04  3:07     ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 04/13] cuda.c: fix CUDA ADB error packet format Mark Cave-Ayland
2015-11-04  3:12   ` David Gibson
2015-11-04 22:53     ` Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 05/13] cuda.c: fix CUDA_PACKET response " Mark Cave-Ayland
2015-11-04  3:15   ` David Gibson
2015-11-04 22:58     ` Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 06/13] cuda.c: implement simple CUDA_GET_6805_ADDR command Mark Cave-Ayland
2015-11-04  3:16   ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 07/13] cuda.c: implement dummy IIC access commands Mark Cave-Ayland
2015-11-04  3:17   ` David Gibson
2015-11-04 23:03     ` Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 08/13] cuda.c: fix CUDA SR interrupt clearing Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 09/13] cuda.c: add defines for CUDA registers Mark Cave-Ayland
2015-11-04  3:19   ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 10/13] cuda.c: refactor get_tb() so that the time can be passed in Mark Cave-Ayland
2015-11-04  3:20   ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 11/13] cuda.c: rename get_counter() state variable from s to ti for consistency Mark Cave-Ayland
2015-11-04  3:22   ` David Gibson
2015-10-23 13:56 ` [Qemu-devel] [PATCH 12/13] cuda.c: fix T2 timer and enable its interrupt Mark Cave-Ayland
2015-11-04  3:40   ` David Gibson
2015-11-04 23:25     ` Mark Cave-Ayland
2015-11-11  6:52       ` David Gibson
2015-11-11 22:34         ` Mark Cave-Ayland
2015-10-23 13:56 ` [Qemu-devel] [PATCH 13/13] cuda.c: add delay to setting of SR_INT bit Mark Cave-Ayland
2015-11-04  3:42   ` David Gibson
2015-10-30 16:48 ` [Qemu-devel] [PATCH 00/13] Mac OS 9 compatibility improvements (upstream rework) Mark Cave-Ayland
2015-11-04  3:44   ` David Gibson
2015-11-04 23:32     ` Mark Cave-Ayland
2015-11-11  2:11       ` David Gibson
2015-11-11  6:29         ` Mark Cave-Ayland
2015-11-11  6:52           ` David Gibson
2015-11-11  8:08             ` Mark Cave-Ayland

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