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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
	qemu-arm@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>,
	"Andreas Färber" <afaerber@suse.de>,
	patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH 08/16] exec.c: Have one io_mem_watch per AddressSpace
Date: Mon, 9 Nov 2015 11:49:16 +0100	[thread overview]
Message-ID: <56407A2C.7050906@redhat.com> (raw)
In-Reply-To: <1446747358-18214-9-git-send-email-peter.maydell@linaro.org>



On 05/11/2015 19:15, Peter Maydell wrote:
> The io_mem_watch MemoryRegion's read and write callbacks pass the
> accesses through to an underlying address space. Now that that
> might be something other than address_space_memory, we need to
> pass the correct AddressSpace in via the opaque pointer. That
> means we need to have one io_mem_watch MemoryRegion per address
> space, rather than sharing one between all address spaces.
> 
> This should also fix gdbstub watchpoints in x86 SMRAM, which would
> previously not have worked correctly.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
>  exec.c                | 40 +++++++++++++++++++++++-----------------
>  include/exec/memory.h |  2 ++
>  2 files changed, 25 insertions(+), 17 deletions(-)
> 
> diff --git a/exec.c b/exec.c
> index bc6ab8a..9998fa0 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -163,8 +163,6 @@ static void io_mem_init(void);
>  static void memory_map_init(void);
>  static void tcg_commit(MemoryListener *listener);
>  
> -static MemoryRegion io_mem_watch;
> -
>  /**
>   * CPUAddressSpace: all the information a CPU needs about an AddressSpace
>   * @cpu: the CPU whose AddressSpace this is
> @@ -334,12 +332,6 @@ static MemoryRegionSection *phys_page_find(PhysPageEntry lp, hwaddr addr,
>      }
>  }
>  
> -bool memory_region_is_unassigned(MemoryRegion *mr)
> -{
> -    return mr != &io_mem_rom && mr != &io_mem_notdirty && !mr->rom_device
> -        && mr != &io_mem_watch;
> -}
> -
>  /* Called from RCU critical section */
>  static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
>                                                          hwaddr addr,
> @@ -2045,17 +2037,18 @@ static MemTxResult watch_mem_read(void *opaque, hwaddr addr, uint64_t *pdata,
>  {
>      MemTxResult res;
>      uint64_t data;
> +    AddressSpace *as = opaque;
>  
>      check_watchpoint(addr & ~TARGET_PAGE_MASK, size, attrs, BP_MEM_READ);
>      switch (size) {
>      case 1:
> -        data = address_space_ldub(&address_space_memory, addr, attrs, &res);
> +        data = address_space_ldub(as, addr, attrs, &res);
>          break;
>      case 2:
> -        data = address_space_lduw(&address_space_memory, addr, attrs, &res);
> +        data = address_space_lduw(as, addr, attrs, &res);
>          break;
>      case 4:
> -        data = address_space_ldl(&address_space_memory, addr, attrs, &res);
> +        data = address_space_ldl(as, addr, attrs, &res);
>          break;
>      default: abort();
>      }

current_cpu is available here, so it should be possible to have only one
io_mem_watch per CPU address space index (i.e. two).

But actually, if the address space can be derived from the attributes,
you just need to fish the right address space out of current_cpu.

> +    as->io_mem_watch = g_new0(MemoryRegion, 1);

This is leaked when the address space goes away.  You can allocate it
statically inside AddressSpace if my alternative plan from above doesn't
work out.

> +    memory_region_init_io(as->io_mem_watch, NULL, &watch_mem_ops, as,
> +                          NULL, UINT64_MAX);
> +
>      as->dispatch = NULL;
>      as->dispatch_listener = (MemoryListener) {
>          .begin = mem_begin,
> @@ -2339,6 +2344,7 @@ void address_space_destroy_dispatch(AddressSpace *as)
>      if (d) {
>          call_rcu(d, address_space_dispatch_free, rcu);
>      }
> +    memory_region_unref(as->io_mem_watch);

  parent reply	other threads:[~2015-11-09 10:49 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05 18:15 [Qemu-devel] [PATCH 00/16] Add support for multiple address spaces per CPU and use it for ARM TrustZone Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 01/16] exec.c: Don't set cpu->as until cpu_address_space_init Peter Maydell
2015-11-06 13:04   ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 02/16] exec.c: Allow target CPUs to define multiple AddressSpaces Peter Maydell
2015-11-06 13:21   ` Edgar E. Iglesias
2015-11-06 13:34     ` Peter Maydell
2015-11-06 13:49       ` Edgar E. Iglesias
2015-11-09 10:32       ` Paolo Bonzini
2015-11-09 10:30   ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 03/16] tlb_set_page_with_attrs: Take argument specifying AddressSpace to use Peter Maydell
2015-11-06 13:27   ` Edgar E. Iglesias
2015-11-06 13:41     ` Peter Maydell
2015-11-06 13:49       ` Edgar E. Iglesias
2015-11-06 13:52         ` Edgar E. Iglesias
2015-11-09 10:44   ` Paolo Bonzini
2015-11-09 10:49     ` Peter Maydell
2015-11-10 16:13       ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 04/16] exec.c: Add address space index to CPUIOTLBEntry Peter Maydell
2015-11-06 13:34   ` Edgar E. Iglesias
2015-11-06 13:45     ` Peter Maydell
2015-11-06 14:13       ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 05/16] exec.c: Add cpu_get_address_space() Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 06/16] include/qom/cpu.h: Add new get_phys_page_asidx_debug method Peter Maydell
2015-11-06 13:37   ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 07/16] exec.c: Use cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 13:38   ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 08/16] exec.c: Have one io_mem_watch per AddressSpace Peter Maydell
2015-11-06 13:45   ` Edgar E. Iglesias
2015-11-09 10:49   ` Paolo Bonzini [this message]
2015-11-09 10:54     ` Peter Maydell
2015-11-09 11:00       ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 09/16] target-arm: Support multiple address spaces in page table walks Peter Maydell
2015-11-06 14:22   ` Edgar E. Iglesias
2015-11-09 10:51   ` Paolo Bonzini
2015-11-09 10:58     ` Peter Maydell
2015-11-09 11:03       ` Paolo Bonzini
2015-11-09 11:09         ` Peter Maydell
2015-11-09 11:19           ` Paolo Bonzini
2015-11-09 11:22             ` Peter Maydell
2015-11-13 18:51       ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 10/16] target-arm: Implement cpu_get_phys_page_asidx_debug Peter Maydell
2015-11-06 14:23   ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 11/16] memory: Add address_space_init_shareable() Peter Maydell
2015-11-06 14:29   ` Edgar E. Iglesias
2015-11-06 14:49     ` Peter Maydell
2015-11-09 10:55   ` Paolo Bonzini
2015-11-09 10:59     ` Peter Maydell
2015-11-09 11:02       ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 12/16] qom/cpu: Add MemoryRegion property Peter Maydell
2015-11-06 14:31   ` Edgar E. Iglesias
2015-11-09 10:56   ` Paolo Bonzini
2015-11-05 18:15 ` [Qemu-devel] [PATCH 13/16] target-arm: Add QOM property for Secure memory region Peter Maydell
2015-11-06 14:33   ` Edgar E. Iglesias
2015-11-05 18:15 ` [Qemu-devel] [PATCH 14/16] hw/arm/virt: Wire up memory region to CPUs explicitly Peter Maydell
2015-11-06 14:45   ` Edgar E. Iglesias
2015-11-06 14:51     ` Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 15/16] [RFC] hw/arm/virt: add secure memory region and UART Peter Maydell
2015-11-05 18:15 ` [Qemu-devel] [PATCH 16/16] HACK: rearrange the virt memory map to suit OP-TEE Peter Maydell

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