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From: Sergey Fedorov <serge.fdrv@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 1/2] target-arm: Update condexec before CP access check in AA32 translation
Date: Tue, 17 Nov 2015 16:38:02 +0300	[thread overview]
Message-ID: <564B2DBA.1030003@gmail.com> (raw)
In-Reply-To: <CAFEAcA-CLEaRWimu2R-k9kbRvXUkfqMp4si4dai1B-DSrELWuQ@mail.gmail.com>

On 17.11.2015 16:31, Peter Maydell wrote:
> On 17 November 2015 at 10:59, Sergey Fedorov <serge.fdrv@gmail.com> wrote:
>> On 16.11.2015 22:34, Sergey Fedorov wrote:
>>> Coprocessor access instructions are allowed inside IT block.
>>> gen_helper_access_check_cp_reg() can raise an exceptions thus condexec
>>> bits should be updated before.
>>>
>>> Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com>
>>> ---
>>>  target-arm/translate.c | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/target-arm/translate.c b/target-arm/translate.c
>>> index 4351854..f1f8129 100644
>>> --- a/target-arm/translate.c
>>> +++ b/target-arm/translate.c
>>> @@ -7210,6 +7210,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
>>>                  break;
>>>              }
>>>
>>> +            gen_set_condexec(dc);
>> Ah, there must be gen_set_condexec(s).
> Yep. Are you going to resend?

I got sort of ahead of myself with the patch. Yes, I will resend it now.

Best,
Sergey

  reply	other threads:[~2015-11-17 13:38 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-16 19:34 [Qemu-devel] [PATCH 0/2] target-arm: Missed gen_set_condexec() in AA32 translation Sergey Fedorov
2015-11-16 19:34 ` [Qemu-devel] [PATCH 1/2] target-arm: Update condexec before CP access check " Sergey Fedorov
2015-11-17 10:59   ` Sergey Fedorov
2015-11-17 13:31     ` Peter Maydell
2015-11-17 13:38       ` Sergey Fedorov [this message]
2015-11-16 19:34 ` [Qemu-devel] [PATCH 2/2] target-arm: Update condexec before arch BP " Sergey Fedorov

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