From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49793) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zyip7-0001GX-Sm for qemu-devel@nongnu.org; Tue, 17 Nov 2015 11:09:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zyip3-0005XJ-BN for qemu-devel@nongnu.org; Tue, 17 Nov 2015 11:09:37 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:51117) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zyip3-0005X6-5K for qemu-devel@nongnu.org; Tue, 17 Nov 2015 11:09:33 -0500 References: <1447690698-20276-1-git-send-email-james.hogan@imgtec.com> From: Leon Alrae Message-ID: <564B5134.7010106@imgtec.com> Date: Tue, 17 Nov 2015 16:09:24 +0000 MIME-Version: 1.0 In-Reply-To: <1447690698-20276-1-git-send-email-james.hogan@imgtec.com> Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] target-mips: Fix exceptions while UX=0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: James Hogan Cc: qemu-devel@nongnu.org, Aurelien Jarno On 16/11/15 16:18, James Hogan wrote: > However when exceptions are taken outside of exception level, > mips_cpu_do_interrupt() manipulates the env->hflags directly rather tha= n > using compute_hflags() to update them, and this code wasn't updated > accordingly. As a result, when UX is cleared, MIPS_HFLAG_AWRAP is set, > but it doesn't get cleared on entry back into kernel mode due to an > exception. Kernel mode then cannot access the 64-bit segments resulting > in a nested exception loop. Indeed, thanks for the fix. >=20 > Fix by updating mips_cpu_do_interrupt() to clear the MIPS_HFLAG_WRAP > flag when necessary, according to compute_hflags(). >=20 > Fixes: 01f728857941 ("target-mips: Status.UX/SX/KX enable 32-bit...") > Signed-off-by: James Hogan > Cc: Leon Alrae > Cc: Aurelien Jarno > --- > Note, compute_hflags() doesn't seem to take KX into account pre-r6, > which seems wrong. Why does it seem wrong? According to PRA, prior to R6 (excluding the R5+EVA case which we don=92t support) this special behaviour for data references (i.e. sign-extension of the effective address when 64-bit addressing is disabled) is only in User Mode. > --- > target-mips/helper.c | 4 ++++ > 1 file changed, 4 insertions(+) >=20 > diff --git a/target-mips/helper.c b/target-mips/helper.c > index b3fe816fecf8..0625f610a015 100644 > --- a/target-mips/helper.c > +++ b/target-mips/helper.c > @@ -725,6 +725,10 @@ void mips_cpu_do_interrupt(CPUState *cs) > env->CP0_Status |=3D (1 << CP0St_EXL); > if (env->insn_flags & ISA_MIPS3) { > env->hflags |=3D MIPS_HFLAG_64; > + if (!(env->insn_flags & ISA_MIPS64R6) || > + env->CP0_Status & (1 << CP0St_KX)) { > + env->hflags &=3D ~MIPS_HFLAG_AWRAP; > + } Any reason you skipped set_error_EPC and enter_DEPC? The flag needs to be cleared there as well I think. Thanks, Leon > } > env->hflags |=3D MIPS_HFLAG_CP0; > env->hflags &=3D ~(MIPS_HFLAG_KSU); >=20