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Date: Wed, 25 Nov 2015 10:42:34 +0800
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Subject: Re: [Qemu-devel] [PATCH 2/4] vmxnet3: Change offsets of PCI
 capabilities
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To: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
Cc: Dmitry Fleytman <dmitry@daynix.com>, idan.brown@ravellosystems.com, qemu-devel@nongnu.org



On 11/19/2015 06:52 PM, Shmulik Ladkani wrote:
> Place device reported PCI capabilities at the same offsets as placed by
> the VMware virtual hardware:
>   Express Endpoint at [48], MSI at [84], MSI-X at [9c].
>
> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
> ---
>  hw/net/vmxnet3.c | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
> index ed286cc..48a8242 100644
> --- a/hw/net/vmxnet3.c
> +++ b/hw/net/vmxnet3.c
> @@ -36,6 +36,10 @@
>  #define VMXNET3_MSIX_BAR_SIZE 0x2000
>  #define MIN_BUF_SIZE 60
>  
> +#define VMXNET3_EXP_EP_OFFSET  (0x48)
> +#define VMXNET3_MSI_OFFSET     (0x84)
> +#define VMXNET3_MSIX_OFFSET    (0x9c)
> +
>  #define VMXNET3_BAR0_IDX      (0)
>  #define VMXNET3_BAR1_IDX      (1)
>  #define VMXNET3_MSIX_BAR_IDX  (2)
> @@ -2103,7 +2107,7 @@ vmxnet3_init_msix(VMXNET3State *s)
>                          VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE,
>                          &s->msix_bar,
>                          VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA,
> -                        0);
> +                        VMXNET3_MSIX_OFFSET);
>  
>      if (0 > res) {
>          VMW_WRPRN("Failed to initialize MSI-X, error %d", res);
> @@ -2131,7 +2135,6 @@ vmxnet3_cleanup_msix(VMXNET3State *s)
>      }
>  }
>  
> -#define VMXNET3_MSI_OFFSET        (0x50)
>  #define VMXNET3_USE_64BIT         (true)
>  #define VMXNET3_PER_VECTOR_MASK   (false)
>  
> @@ -2234,7 +2237,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, Error **errp)
>      }
>  
>      if (pci_bus_is_express(pci_dev->bus)) {
> -        pcie_endpoint_cap_init(pci_dev, 0);
> +        pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET);
>      }
>  
>      vmxnet3_net_init(s);

Looks the same issue as patch 1, this changes is guest visible after
migration.