From: Jason Wang <jasowang@redhat.com>
To: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>,
Dmitry Fleytman <dmitry@daynix.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>,
idan.brown@ravellosystems.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 1/5] vmxnet3: Change offsets of msi/msix pci capabilities
Date: Fri, 4 Dec 2015 16:49:23 +0800 [thread overview]
Message-ID: <56615393.6020703@redhat.com> (raw)
In-Reply-To: <1449069991-6109-2-git-send-email-shmulik.ladkani@ravellosystems.com>
On 12/02/2015 11:26 PM, Shmulik Ladkani wrote:
> Place device reported PCI capabilities at the same offsets as placed by
> the VMware virtual hardware: MSI at [84], MSI-X at [9c].
>
> For compatability, preserve old offsets using 'x-old-msi-offsets' toggle.
>
> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
> ---
> hw/net/vmxnet3.c | 20 +++++++++++++++++---
> include/hw/compat.h | 4 ++++
> 2 files changed, 21 insertions(+), 3 deletions(-)
>
> diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
> index 5e3a233..1985dcf 100644
> --- a/hw/net/vmxnet3.c
> +++ b/hw/net/vmxnet3.c
> @@ -36,6 +36,16 @@
> #define VMXNET3_MSIX_BAR_SIZE 0x2000
> #define MIN_BUF_SIZE 60
>
> +/* Compatability flags for migration */
> +#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT 0
> +#define VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS \
> + (1 << VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT)
> +
> +#define VMXNET3_MSI_OFFSET(s) \
> + ((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0x50 : 0x84)
> +#define VMXNET3_MSIX_OFFSET(s) \
> + ((s)->compat_flags & VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS ? 0 : 0x9c)
> +
> #define VMXNET3_BAR0_IDX (0)
> #define VMXNET3_BAR1_IDX (1)
> #define VMXNET3_MSIX_BAR_IDX (2)
> @@ -313,6 +323,9 @@ typedef struct {
> MACAddr *mcast_list;
> uint32_t mcast_list_len;
> uint32_t mcast_list_buff_size; /* needed for live migration. */
> +
> + /* Compatability flags for migration */
> + uint32_t compat_flags;
> } VMXNET3State;
>
> /* Interrupt management */
> @@ -2103,7 +2116,7 @@ vmxnet3_init_msix(VMXNET3State *s)
> VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_TABLE,
> &s->msix_bar,
> VMXNET3_MSIX_BAR_IDX, VMXNET3_OFF_MSIX_PBA,
> - 0);
> + VMXNET3_MSIX_OFFSET(s));
>
> if (0 > res) {
> VMW_WRPRN("Failed to initialize MSI-X, error %d", res);
> @@ -2131,7 +2144,6 @@ vmxnet3_cleanup_msix(VMXNET3State *s)
> }
> }
>
> -#define VMXNET3_MSI_OFFSET (0x50)
> #define VMXNET3_USE_64BIT (true)
> #define VMXNET3_PER_VECTOR_MASK (false)
>
> @@ -2141,7 +2153,7 @@ vmxnet3_init_msi(VMXNET3State *s)
> PCIDevice *d = PCI_DEVICE(s);
> int res;
>
> - res = msi_init(d, VMXNET3_MSI_OFFSET, VMXNET3_MAX_NMSIX_INTRS,
> + res = msi_init(d, VMXNET3_MSI_OFFSET(s), VMXNET3_MAX_NMSIX_INTRS,
> VMXNET3_USE_64BIT, VMXNET3_PER_VECTOR_MASK);
> if (0 > res) {
> VMW_WRPRN("Failed to initialize MSI, error %d", res);
> @@ -2552,6 +2564,8 @@ static const VMStateDescription vmstate_vmxnet3 = {
>
> static Property vmxnet3_properties[] = {
> DEFINE_NIC_PROPERTIES(VMXNET3State, conf),
> + DEFINE_PROP_BIT("x-old-msi-offsets", VMXNET3State, compat_flags,
> + VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT, false),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> diff --git a/include/hw/compat.h b/include/hw/compat.h
> index d0b1c4f..01e326d 100644
> --- a/include/hw/compat.h
> +++ b/include/hw/compat.h
> @@ -18,6 +18,10 @@
> .driver = "virtio-pci",\
> .property = "migrate-extra",\
> .value = "off",\
> + },{\
> + .driver = "vmxnet3",\
> + .property = "x-old-msi-offsets",\
> + .value = "on",\
> },
To have a better bisection behavior, we'd better enable this and compat
it in patch 2.
>
> #define HW_COMPAT_2_3 \
next prev parent reply other threads:[~2015-12-04 8:49 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-02 15:26 [Qemu-devel] [PATCH v2 0/5] Fine-tune device capabilities Shmulik Ladkani
2015-12-02 15:26 ` [Qemu-devel] [PATCH v2 1/5] vmxnet3: Change offsets of msi/msix pci capabilities Shmulik Ladkani
2015-12-04 8:49 ` Jason Wang [this message]
2015-12-04 19:38 ` Shmulik Ladkani
2015-12-07 2:40 ` Jason Wang
2015-12-02 15:26 ` [Qemu-devel] [PATCH v2 2/5] vmxnet3: Change the offset of the MSIX PBA table Shmulik Ladkani
2015-12-02 15:26 ` [Qemu-devel] [PATCH v2 3/5] vmxnet3: coding: Introduce VMXNET3Class Shmulik Ladkani
2015-12-02 15:26 ` [Qemu-devel] [PATCH v2 4/5] vmxnet3: The vmxnet3 device is a PCIE endpoint Shmulik Ladkani
2015-12-04 8:49 ` Jason Wang
2015-12-04 19:57 ` Shmulik Ladkani
2015-12-07 2:46 ` Jason Wang
2015-12-02 15:26 ` [Qemu-devel] [PATCH v2 5/5] vmxnet3: Report the Device Serial Number capability Shmulik Ladkani
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56615393.6020703@redhat.com \
--to=jasowang@redhat.com \
--cc=dmitry@daynix.com \
--cc=idan.brown@ravellosystems.com \
--cc=marcel@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=shmulik.ladkani@ravellosystems.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).