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From: Richard Henderson <rth@twiddle.net>
To: Chen Gang <chengang@emindsoft.com.cn>,
	Peter Maydell <peter.maydell@linaro.org>,
	Chris Metcalf <cmetcalf@ezchip.com>
Cc: chenwei@emindsoft.com.cn, qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v3 4/4] target-tilegx: Integrate floating pointer implementation
Date: Thu, 10 Dec 2015 13:37:18 -0800	[thread overview]
Message-ID: <5669F08E.4030002@twiddle.net> (raw)
In-Reply-To: <5669894B.50708@emindsoft.com.cn>

On 12/10/2015 06:16 AM, Chen Gang wrote:
> 
> It passes normal building, and gcc testsuite.
> 
> Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
> ---
>  target-tilegx/Makefile.objs |  3 +-
>  target-tilegx/cpu.h         |  2 ++
>  target-tilegx/helper.h      | 12 ++++++++
>  target-tilegx/translate.c   | 68 +++++++++++++++++++++++++++++++++++++++------
>  4 files changed, 75 insertions(+), 10 deletions(-)
> 
> diff --git a/target-tilegx/Makefile.objs b/target-tilegx/Makefile.objs
> index 0db778f..136ad60 100644
> --- a/target-tilegx/Makefile.objs
> +++ b/target-tilegx/Makefile.objs
> @@ -1 +1,2 @@
> -obj-y += cpu.o translate.o helper.o simd_helper.o
> +obj-y += cpu.o translate.o helper.o simd_helper.o \
> +		helper-fsingle.o helper-fdouble.o
> diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h
> index 03df107..445a606 100644
> --- a/target-tilegx/cpu.h
> +++ b/target-tilegx/cpu.h
> @@ -88,6 +88,8 @@ typedef struct CPUTLGState {
>      uint64_t spregs[TILEGX_SPR_COUNT]; /* Special used registers by outside */
>      uint64_t pc;                       /* Current pc */
>  
> +    float_status fp_status;            /* floating point status */

As mentioned elsewhere, this is pointless.

> +    case OE_RR_X0(FSINGLE_PACK1):
> +    case OE_RR_Y0(FSINGLE_PACK1):
> +        mnemonic = "fsingle_pack1";
> +        goto done2;

This could use a comment that we're "copying" dest to dest.

> @@ -742,13 +745,21 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext,
>  static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext,
>                                 unsigned dest, unsigned srca, unsigned srcb)
>  {
> -    TCGv tdest = dest_gr(dc, dest);
> -    TCGv tsrca = load_gr(dc, srca);
> -    TCGv tsrcb = load_gr(dc, srcb);
> +    TCGv tdest, tsrca, tsrcb;
>      TCGv t0;
>      const char *mnemonic;
>  
>      switch (opext) {
> +    case OE_RRR(FSINGLE_ADDSUB2, 0, X0):
> +        mnemonic = "fsingle_addsub2";
> +        goto done2;
> +    }

Likewise.


r~

  reply	other threads:[~2015-12-10 21:37 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <56698865.8050901@emindsoft.com.cn>
2015-12-10 14:13 ` [Qemu-devel] [PATCH v3 1/4] target-tilegx: Add floating point shared functions Chen Gang
2015-12-10 14:15 ` [Qemu-devel] [PATCH v3 2/4] target-tilegx: Add single floating point implementation Chen Gang
2015-12-10 17:15   ` Richard Henderson
2015-12-10 20:18     ` Richard Henderson
2015-12-10 22:15       ` Chen Gang
2015-12-22 22:29         ` Chen Gang
2015-12-10 22:14     ` Chen Gang
2015-12-20 15:30       ` Chen Gang
2015-12-21 15:01         ` Richard Henderson
2015-12-21 18:54           ` Chen Gang
2015-12-22  2:00             ` Richard Henderson
2015-12-10 14:15 ` [Qemu-devel] [PATCH v3 3/4] target-tilegx: Add double " Chen Gang
2015-12-10 21:17   ` Richard Henderson
2015-12-11 23:38     ` Chen Gang
2015-12-12  0:41       ` Richard Henderson
2015-12-12  2:45         ` Chen Gang
2015-12-10 14:16 ` [Qemu-devel] [PATCH v3 4/4] target-tilegx: Integrate floating pointer implementation Chen Gang
2015-12-10 21:37   ` Richard Henderson [this message]
2015-12-10 21:44     ` Chen Gang
2015-12-10 14:26 ` [Qemu-devel] [PATCH v3 0/4] target-tilegx: Implement floating point instructions Chen Gang

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