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From: Paolo Bonzini <pbonzini@redhat.com>
To: Alvise Rigo <a.rigo@virtualopensystems.com>,
	qemu-devel@nongnu.org, mttcg@greensocs.com
Cc: alex.bennee@linaro.org, jani.kokkonen@huawei.com,
	tech@virtualopensystems.com, claudio.fontana@huawei.com,
	rth@twiddle.net
Subject: Re: [Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses
Date: Mon, 14 Dec 2015 10:35:56 +0100	[thread overview]
Message-ID: <566E8D7C.9030400@redhat.com> (raw)
In-Reply-To: <1450082498-27109-10-git-send-email-a.rigo@virtualopensystems.com>



On 14/12/2015 09:41, Alvise Rigo wrote:
> +static inline void excl_history_put_addr(CPUState *cpu, hwaddr addr)
> +{
> +    /* Avoid some overhead if the address we are about to put is equal to
> +     * the last one */
> +    if (cpu->excl_protected_addr[cpu->excl_protected_last] !=
> +                                    (addr & TARGET_PAGE_MASK)) {
> +        cpu->excl_protected_last = (cpu->excl_protected_last + 1) %
> +                                            EXCLUSIVE_HISTORY_LEN;

Either use "&" here...

> +        /* Unset EXCL bit of the oldest entry */
> +        if (cpu->excl_protected_addr[cpu->excl_protected_last] !=
> +                                            EXCLUSIVE_RESET_ADDR) {
> +            cpu_physical_memory_unset_excl(
> +                cpu->excl_protected_addr[cpu->excl_protected_last],
> +                cpu->cpu_index);
> +        }
> +
> +        /* Add a new address, overwriting the oldest one */
> +        cpu->excl_protected_addr[cpu->excl_protected_last] =
> +                                            addr & TARGET_PAGE_MASK;
> +    }
> +}
> +
>  #define MMUSUFFIX _mmu
>  
>  /* Generates LoadLink/StoreConditional helpers in softmmu_template.h */
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 9e409ce..5f65ebf 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -217,6 +217,7 @@ struct kvm_run;
>  
>  /* Atomic insn translation TLB support. */
>  #define EXCLUSIVE_RESET_ADDR ULLONG_MAX
> +#define EXCLUSIVE_HISTORY_LEN 8
>  
>  /**
>   * CPUState:
> @@ -343,6 +344,8 @@ struct CPUState {
>       * The address is set to EXCLUSIVE_RESET_ADDR if the vCPU is not.
>       * in the middle of a LL/SC. */
>      struct Range excl_protected_range;
> +    hwaddr excl_protected_addr[EXCLUSIVE_HISTORY_LEN];
> +    int excl_protected_last;

... or make this an "unsigned int".  Otherwise the code will contain an
actual (and slow) modulo operation.

Paolo

>      /* Used to carry the SC result but also to flag a normal (legacy)
>       * store access made by a stcond (see softmmu_template.h). */
>      int excl_succeeded;

  reply	other threads:[~2015-12-14  9:36 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-14  8:41 [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation Alvise Rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 01/14] exec.c: Add new exclusive bitmap to ram_list Alvise Rigo
2015-12-18 13:18   ` Alex Bennée
2015-12-18 13:47     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 02/14] softmmu: Add new TLB_EXCL flag Alvise Rigo
2016-01-05 16:10   ` Alex Bennée
2016-01-05 17:27     ` alvise rigo
2016-01-05 18:39       ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 03/14] Add CPUClass hook to set exclusive range Alvise Rigo
2016-01-05 16:42   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 04/14] softmmu: Add helpers for a new slowpath Alvise Rigo
2016-01-06 15:16   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 05/14] tcg: Create new runtime helpers for excl accesses Alvise Rigo
2015-12-14  9:40   ` Paolo Bonzini
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled Alvise Rigo
2015-12-14  9:38   ` Paolo Bonzini
2015-12-14  9:39     ` Paolo Bonzini
2015-12-14 10:14   ` Laurent Vivier
2015-12-15 14:23     ` alvise rigo
2015-12-15 14:31       ` Paolo Bonzini
2015-12-15 15:18         ` Laurent Vivier
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 07/14] target-arm: translate: Use ld/st excl for atomic insns Alvise Rigo
2016-01-06 17:11   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 08/14] target-arm: Add atomic_clear helper for CLREX insn Alvise Rigo
2016-01-06 17:13   ` Alex Bennée
2016-01-06 17:27     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses Alvise Rigo
2015-12-14  9:35   ` Paolo Bonzini [this message]
2015-12-15 14:26     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 10/14] softmmu: Simplify helper_*_st_name, wrap unaligned code Alvise Rigo
2016-01-07 14:46   ` Alex Bennée
2016-01-07 15:09     ` alvise rigo
2016-01-07 16:35       ` Alex Bennée
2016-01-07 16:54         ` alvise rigo
2016-01-07 17:36           ` Alex Bennée
2016-01-08 11:19   ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code Alvise Rigo
2016-01-11  9:54   ` Alex Bennée
2016-01-11 10:19     ` alvise rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 12/14] softmmu: Simplify helper_*_st_name, wrap RAM code Alvise Rigo
2015-12-17 16:52   ` Alex Bennée
2015-12-17 17:13     ` alvise rigo
2015-12-17 20:20       ` Alex Bennée
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 13/14] softmmu: Include MMIO/invalid exclusive accesses Alvise Rigo
2015-12-14  8:41 ` [Qemu-devel] [RFC v6 14/14] softmmu: Protect MMIO exclusive range Alvise Rigo
2015-12-14  9:33 ` [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation Paolo Bonzini
2015-12-14 10:04   ` alvise rigo
2015-12-14 10:17     ` Paolo Bonzini
2015-12-15 13:59       ` alvise rigo
2015-12-15 14:18         ` Paolo Bonzini
2015-12-15 14:22           ` alvise rigo
2015-12-14 22:09 ` Andreas Tobler
2015-12-15  8:16   ` alvise rigo
2015-12-17 16:06 ` Alex Bennée
2015-12-17 16:16   ` alvise rigo
2016-01-06 18:00 ` Andrew Baumann
2016-01-07 10:21   ` alvise rigo
2016-01-07 10:22     ` Peter Maydell
2016-01-07 10:49       ` alvise rigo
2016-01-07 11:16         ` Peter Maydell

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