From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44768) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a9JNx-0007NL-57 for qemu-devel@nongnu.org; Wed, 16 Dec 2015 16:13:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a9JNw-0002FQ-6u for qemu-devel@nongnu.org; Wed, 16 Dec 2015 16:13:21 -0500 References: <1449773244-17078-1-git-send-email-serge.fdrv@gmail.com> <566B5E9E.8040108@twiddle.net> <566C7D38.4040609@gmail.com> <566EEC05.2080702@twiddle.net> <56707FD3.20705@gmail.com> <56719970.9000106@twiddle.net> From: Sergey Fedorov Message-ID: <5671D3E6.2070808@gmail.com> Date: Thu, 17 Dec 2015 00:13:10 +0300 MIME-Version: 1.0 In-Reply-To: <56719970.9000106@twiddle.net> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-*: Get rid of "PC advancement" trick List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-devel@nongnu.org Cc: Peter Maydell , Eduardo Habkost , Anthony Green , Alexander Graf , Max Filippov , Michael Walle , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, "Edgar E. Iglesias" , Paolo Bonzini , Guan Xuetao , Leon Alrae , Aurelien Jarno , Jia Liu On 12/16/15 20:03, Richard Henderson wrote: > On 12/15/2015 01:02 PM, Sergey Fedorov wrote: >>> For that, I think it might be interesting to arrange for non-empty >>> TBs to >>> exit prior to recognizing a breakpoint. So that a breakpoint TB is >>> always >>> just the one operation. Except for the fact that "generate an >>> exception" has >>> traditionally been a target-specific helper, we could almost make >>> the entire >>> breakpoint generation be done in common code. >>> >>> I'd think something like a generic "must we end the TB now" >>> predicate would >>> be the proper hook. It would contain all of the usual stuff: >>> tcg_op_buf_full >>> and checks for singlestep, but then add "is there a breakpoint at >>> the next pc". >> >> This could be a next step :) > > Or perhaps a first step, since the patch you posted doesn't seem to me > to be an improvement at all, merely a rearrangement of code. I should give it a thought. The main motivation of this patch was to simply suppress useless disas log and the instruction length mismatch disas warning in case of an empty TB. The original reason was that there is a place in ARM translation with "PC advancement" tick missed. Thanks, Sergey