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From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
	qemu-arm <qemu-arm@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v2 03/26] armv7m: Explicit error for bad vector table
Date: Sun, 27 Dec 2015 15:43:58 -0500	[thread overview]
Message-ID: <56804D8E.3020509@gmail.com> (raw)
In-Reply-To: <CAFEAcA--3_zaVHzhF5e5SEJ2avcOKVdwitu0iBXLwb9B6z073g@mail.gmail.com>

On 12/17/2015 08:25 AM, Peter Maydell wrote:
> On 3 December 2015 at 00:18, Michael Davidsaver <mdavidsaver@gmail.com> wrote:
>> ...
>> +static
>> +uint32_t arm_v7m_load_vector(ARMCPU *cpu)
>> +
>> +{
>> +    CPUState *cs = &cpu->parent_obj;
> This isn't the right way to cast to the base class of a QOM object.
> You want:
>    CPUState *cs = CPU(cpu);

from cpu.h

> /* Since this macro is used a lot in hot code paths and in conjunction
> with
>  * FooCPU *foo_env_get_cpu(), we deviate from usual QOM practice by using
>  * an unchecked cast.
>  */
> #define CPU(obj) ((CPUState *)(obj))

Given the present definition of CPU() this change seems like a step
backwards in terms of safety as mis-use won't be caught at compile or
runtime.  I'll change it anyway.


>
>> +    CPUARMState *env = &cpu->env;
>> +    MemTxResult result;
>> +    hwaddr vec = env->v7m.vecbase + env->v7m.exception * 4;
>> +    uint32_t addr;
>> +
>> +    addr = address_space_ldl(cs->as, vec,
>> +                             MEMTXATTRS_UNSPECIFIED, &result);
>> +    if (result != MEMTX_OK) {
> We could use a comment here:
>    /* Architecturally this should cause a HardFault setting HSFR.VECTTBL,
>     * which would then be immediately followed by our failing to load
>     * the entry vector for that HardFault, which is a Lockup case.
>     * Since we don't model Lockup, we just report this guest error
>     * via cpu_abort().
>     */

Added.

  reply	other threads:[~2015-12-27 20:44 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-03  0:18 [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 01/26] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-12-17 13:10   ` Peter Maydell
2017-01-12 14:14     ` Peter Maydell
2017-01-12 16:33       ` Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 02/26] armv7m: Undo armv7m.hack Michael Davidsaver
2015-12-17 15:38   ` Peter Maydell
2015-12-27 20:22     ` Michael Davidsaver
2015-12-28 18:36       ` Peter Maydell
2015-12-28  1:55     ` Michael Davidsaver
2015-12-28 18:27       ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 03/26] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-12-17 13:25   ` Peter Maydell
2015-12-27 20:43     ` Michael Davidsaver [this message]
2015-12-28 18:38       ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 04/26] armv7m: additional cpu state for exception handling Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 05/26] armv7m: add armv7m_excp_running_prio() Michael Davidsaver
2015-12-17 14:36   ` Peter Maydell
2015-12-27 20:56     ` Michael Davidsaver
2015-12-28 18:41       ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 06/26] armv7m: fix I and F flag handling Michael Davidsaver
2015-12-17 14:39   ` Peter Maydell
2015-12-17 15:18     ` Peter Maydell
2015-12-28  1:59       ` Michael Davidsaver
2015-12-28 18:43         ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 07/26] armv7m: simpler/faster exception start Michael Davidsaver
2015-12-17 15:39   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 08/26] armv7m: rewrite NVIC Michael Davidsaver
2015-12-17 18:49   ` Peter Maydell
2015-12-19 19:08   ` Christopher Friedt
2015-12-19 19:45     ` Christopher Friedt
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 09/26] armv7m: implement CFSR, HFSR, BFAR, and MMFAR Michael Davidsaver
2015-12-17 19:04   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 10/26] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-12-17 19:07   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 11/26] arm: gic: Remove references to NVIC Michael Davidsaver
2015-12-17 19:08   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 12/26] armv7m: check exception return consistency Michael Davidsaver
2015-12-17 19:26   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 13/26] armv7m: implement CCR Michael Davidsaver
2015-12-17 19:31   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 14/26] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-12-17 19:33   ` Peter Maydell
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 15/26] armv7m: add MPU to cortex-m3 and cortex-m4 Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 16/26] armv7m: add some mpu debugging prints Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 17/26] armv7m: mpu background miss is perm fault Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 18/26] armv7m: update base region policy Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 19/26] armv7m: mpu not allowed to map exception return codes Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 20/26] armv7m: observable initial register state Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 21/26] armv7m: CONTROL<1> handling Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 22/26] armv7m: priority field mask Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 23/26] qom: add cpu_generic_init_unrealized() Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 24/26] armv7m: split armv7m_init in two parts Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 25/26] armv7m: remove extra cpu_reset() Michael Davidsaver
2015-12-03  0:18 ` [Qemu-devel] [PATCH v2 26/26] armv7m: decide whether faults are MemManage or BusFault Michael Davidsaver
2015-12-17 19:38 ` [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Peter Maydell

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