From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aHDKP-0003iR-Mq for qemu-devel@nongnu.org; Thu, 07 Jan 2016 11:22:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aHDKL-0008Uv-J1 for qemu-devel@nongnu.org; Thu, 07 Jan 2016 11:22:21 -0500 Received: from bh-25.webhostbox.net ([208.91.199.152]:35081) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aHDKL-0008Ma-DD for qemu-devel@nongnu.org; Thu, 07 Jan 2016 11:22:17 -0500 References: <567B41E3.5060800@roeck-us.net> <20160107155310.GA4064@red-moon> From: Guenter Roeck Message-ID: <568E908D.4070007@roeck-us.net> Date: Thu, 7 Jan 2016 08:21:33 -0800 MIME-Version: 1.0 In-Reply-To: <20160107155310.GA4064@red-moon> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] arm64 qemu tests failing in linux-next since 'arm64: kernel: enforce pmuserenr_el0 initialization and restore' List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Lorenzo Pieralisi , Peter Maydell Cc: Mark Rutland , Will Deacon , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , QEMU Developers On 01/07/2016 07:53 AM, Lorenzo Pieralisi wrote: > On Thu, Jan 07, 2016 at 01:25:35PM +0000, Peter Maydell wrote: >> On 24 December 2015 at 00:52, Guenter Roeck wrote: >>> Hi all, >>> >>> since commit 60792ad349f3 ("arm64: kernel: enforce pmuserenr_el0 >>> initialization >>> and restore"), my arm64 qemu tests of linux-next are failing. After this >>> commit, >>> qemu does not display any output. >>> >>> Qemu version is 2.5.0. Linux kernel configuration is arm64:defconfig. >>> >>> qemu command line is as follows: >>> >>> qemu-system-aarch64 -machine virt -cpu cortex-a57 -machine type=virt >>> -nographic -smp 1 \ >>> -m 512 -kernel arch/arm64/boot/Image -initrd >>> rootfs.arm64.cpio -no-reboot \ >>> -append "console=ttyAMA0" >>> >>> Any idea what might cause this problem and how to fix it (presumably in >>> qemu) ? >> >> This turns out to be because QEMU doesn't currently implement >> PMUSERENR_EL0 for AArch64 (we do have an AArch32 implementation), >> so you get an immediate UNDEF when the kernel touches it, followed >> by an infinite loop of UNDEF exceptions because the instruction >> at the UNDEF vector entrypoint is unallocated at this point in >> execution. >> >> We had previously been relying on the kernel not attempting to >> touch the PMU if the ID_AA64DFR0_EL1 PMUVer bits read 0000 >> ("Performance Monitors extension System registers not implemented"). > > Ok, thanks for looking into this. I wonder why reading pmcr_el0 does > not suffer from the same problem though. > >> Since the v8 ARM ARM states that the Performance Monitors Extension is >> an optional feature of an implementation, this seems like a kernel >> bug to me. (QEMU should probably get round to implementing the PMU >> at some point for feature parity with v7, but this has not been >> a priority for us since they're not actually very useful in a >> fully emulated setup.) > > Fixup patch coming, thanks. > The following code around the register accesses fixes the problem for me. + mrs x0, ID_AA64DFR0_EL1 + tst x0, #0xf00 + b.eq 1f msr pmuserenr_el0, xzr // Disable PMU access from EL0 +1: I don't have a real system, so I can not verify if the register is correctly set there. Plus, of course, I don't really know aarch64 assembler, so the above code may be plain wrong ;-). Guenter