From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56404) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aJ8bu-0007N5-SH for qemu-devel@nongnu.org; Tue, 12 Jan 2016 18:44:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aJ8bp-00053f-Rp for qemu-devel@nongnu.org; Tue, 12 Jan 2016 18:44:22 -0500 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:36351) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aJ8bp-00053X-HU for qemu-devel@nongnu.org; Tue, 12 Jan 2016 18:44:17 -0500 Received: by mail-pf0-x242.google.com with SMTP id n128so5369678pfn.3 for ; Tue, 12 Jan 2016 15:44:16 -0800 (PST) References: <1452236119-24452-1-git-send-email-bharata@linux.vnet.ibm.com> <1452236119-24452-9-git-send-email-bharata@linux.vnet.ibm.com> From: Alexey Kardashevskiy Message-ID: <56958FC7.3090609@ozlabs.ru> Date: Wed, 13 Jan 2016 10:44:07 +1100 MIME-Version: 1.0 In-Reply-To: <1452236119-24452-9-git-send-email-bharata@linux.vnet.ibm.com> Content-Type: text/plain; charset=koi8-r; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v6 08/11] target-ppc: Introduce PowerPC specific CPU core device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bharata B Rao , qemu-devel@nongnu.org Cc: ehabkost@redhat.com, mdroth@linux.vnet.ibm.com, agraf@suse.de, pbonzini@redhat.com, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, nfont@linux.vnet.ibm.com, imammedo@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au On 01/08/2016 05:55 PM, Bharata B Rao wrote: > CPU core device is a container of CPU thread devices. CPU hotplug is > performed at the granularity of CPU core device. When hotplugged, CPU core > creates CPU thread devices. > > Signed-off-by: Bharata B Rao > --- > hw/ppc/Makefile.objs | 1 + > hw/ppc/cpu-core.c | 69 +++++++++++++++++++++++++++++++++++++++++++++++ > include/hw/ppc/cpu-core.h | 22 +++++++++++++++ > 3 files changed, 92 insertions(+) > create mode 100644 hw/ppc/cpu-core.c > create mode 100644 include/hw/ppc/cpu-core.h > > diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs > index c1ffc77..a6b7cfb 100644 > --- a/hw/ppc/Makefile.objs > +++ b/hw/ppc/Makefile.objs > @@ -21,3 +21,4 @@ obj-$(CONFIG_E500) += e500.o mpc8544ds.o e500plat.o > obj-$(CONFIG_E500) += mpc8544_guts.o ppce500_spin.o > # PowerPC 440 Xilinx ML507 reference board. > obj-$(CONFIG_XILINX) += virtex_ml507.o > +obj-y += cpu-core.o > diff --git a/hw/ppc/cpu-core.c b/hw/ppc/cpu-core.c > new file mode 100644 > index 0000000..c5c6188 > --- /dev/null > +++ b/hw/ppc/cpu-core.c > @@ -0,0 +1,69 @@ > +/* > + * CPU core device, acts as container of CPU thread devices. > + * > + * Copyright (C) 2015 Bharata B Rao > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or later. > + * See the COPYING file in the top-level directory. > + */ > +#include "hw/ppc/cpu-core.h" > +#include "hw/boards.h" > +#include > +#include "qemu/error-report.h" > + > +static int ppc_cpu_core_realize_child(Object *child, void *opaque) > +{ > + Error **errp = opaque; > + > + object_property_set_bool(child, true, "realized", errp); > + if (*errp) { > + return 1; > + } > + > + return 0; > +} > + > +static void ppc_cpu_core_realize(DeviceState *dev, Error **errp) > +{ > + object_child_foreach(OBJECT(dev), ppc_cpu_core_realize_child, errp); > +} > + > +static void ppc_cpu_core_class_init(ObjectClass *oc, void *data) > +{ > + DeviceClass *dc = DEVICE_CLASS(oc); > + > + dc->realize = ppc_cpu_core_realize; > +} > + > +static void ppc_cpu_core_instance_init(Object *obj) > +{ > + int i; > + CPUState *cpu; > + MachineState *machine = MACHINE(qdev_get_machine()); > + > + /* Create as many CPU threads as specified in the topology */ > + for (i = 0; i < smp_threads; i++) { > + cpu = cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model); > + if (!cpu) { > + error_report("Unable to find CPU definition: %s\n", > + machine->cpu_model); > + exit(EXIT_FAILURE); > + } > + object_property_add_child(obj, "thread[*]", OBJECT(cpu), &error_abort); > + object_unref(OBJECT(cpu)); > + } > +} > + > +static const TypeInfo ppc_cpu_core_type_info = { > + .name = TYPE_POWERPC_CPU_CORE, > + .parent = TYPE_DEVICE, > + .class_init = ppc_cpu_core_class_init, > + .instance_init = ppc_cpu_core_instance_init, Out of curiosity - why not .realize (and return Error instead of exit())? I'd think this is the recommended approach now for QOM. -- Alexey