From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42294) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aLCnR-0006gt-LL for qemu-devel@nongnu.org; Mon, 18 Jan 2016 11:36:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aLCnO-00054D-DF for qemu-devel@nongnu.org; Mon, 18 Jan 2016 11:36:49 -0500 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]:35719) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aLCnO-000541-2b for qemu-devel@nongnu.org; Mon, 18 Jan 2016 11:36:46 -0500 Received: by mail-wm0-x230.google.com with SMTP id r129so58369221wmr.0 for ; Mon, 18 Jan 2016 08:36:45 -0800 (PST) References: <1452758668-19284-1-git-send-email-davidkiarie4@gmail.com> <1452758668-19284-5-git-send-email-davidkiarie4@gmail.com> <569B9DC5.9040406@redhat.com> From: David Kiarie Message-ID: <569D148C.90807@gmail.com> Date: Mon, 18 Jan 2016 19:36:28 +0300 MIME-Version: 1.0 In-Reply-To: <569B9DC5.9040406@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [V3 4/4] hw/pci-host: Emulate AMD IO MMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Marcel Apfelbaum , qemu-devel@nongnu.org Cc: valentine.sinitsyn@gmail.com, jan.kiszka@web.de, crosthwaitepeter@gmail.com, mst@redhat.com On 1/17/2016 4:57 PM, Marcel Apfelbaum wrote: > On 01/14/2016 10:04 AM, David Kiarie wrote: >> Support AMD IO MMU emulation in q35 and piix chipsets >> >> Signed-off-by: David Kiarie >> --- >> hw/pci-host/piix.c | 11 +++++++++++ >> hw/pci-host/q35.c | 16 ++++++++++++++-- >> 2 files changed, 25 insertions(+), 2 deletions(-) >> >> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c >> index 924f0fa..19e2930 100644 >> --- a/hw/pci-host/piix.c >> +++ b/hw/pci-host/piix.c >> @@ -35,6 +35,7 @@ >> #include "hw/i386/ioapic.h" >> #include "qapi/visitor.h" >> #include "qemu/error-report.h" >> +#include "hw/i386/amd_iommu.h" >> >> /* >> * I440FX chipset data sheet. >> @@ -297,6 +298,16 @@ static void i440fx_pcihost_realize(DeviceState >> *dev, Error **errp) >> >> sysbus_add_io(sbd, 0xcfc, &s->data_mem); >> sysbus_init_ioports(sbd, 0xcfc, 4); >> + >> + /* AMD IOMMU (AMD-Vi) */ >> + if (g_strcmp0(object_property_get_str(qdev_get_machine(), >> "iommu", NULL), >> + "amd") == 0) { > > You can use the Machine wrapper and it will look slightly better (at > least you get rid of the literal): > MACHINE(qdev_get_machine())->iommu <=> > object_property_get_str(qdev_get_machine(), "iommu", NULL) > > > By the way, does i440fx host work with AMD iommu? > > Forgot,... Yeah, I checked this to confirm it works though looking at it, it seems like i440fx doesn't support PCIE(MSI) so interrupt related things might not work here but we're not yet there. > >> + AMDIOMMUState *iommu_state; >> + PCIDevice *iommu; >> + iommu = pci_create_simple(s->bus, 0x20, TYPE_AMD_IOMMU_DEVICE); >> + iommu_state = AMD_IOMMU_DEVICE(iommu); >> + pci_setup_iommu(s->bus, bridge_host_amd_iommu, iommu_state); >> + } >> } >> >> static void i440fx_realize(PCIDevice *dev, Error **errp) >> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c >> index 1fb4707..dd4c822 100644 >> --- a/hw/pci-host/q35.c >> +++ b/hw/pci-host/q35.c >> @@ -30,6 +30,7 @@ >> #include "hw/hw.h" >> #include "hw/pci-host/q35.h" >> #include "qapi/visitor.h" >> +#include "hw/i386/amd_iommu.h" >> >> /**************************************************************************** >> * Q35 host >> @@ -505,10 +506,21 @@ static void mch_realize(PCIDevice *d, Error >> **errp) >> mch->pci_address_space, &mch->pam_regions[i+1], >> PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE); >> } >> - /* Intel IOMMU (VT-d) */ >> - if (object_property_get_bool(qdev_get_machine(), "iommu", NULL)) { >> + >> + char *iommu = object_property_get_str(qdev_get_machine(), >> "iommu", NULL); >> + >> + if (g_strcmp0(iommu, "intel") == 0) { >> + /* Intel IOMMU (VT-d) */ >> mch_init_dmar(mch); >> + } else if (g_strcmp0(iommu, "amd") == 0) { > > Last thing, maybe you can define "intel" and "amd" literals in one > please, > then use it them as you see fit. > > > Thanks, > Marcel > > >> + AMDIOMMUState *iommu_state; >> + PCIDevice *iommu; >> + PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch))); >> + iommu = pci_create_simple(bus, 0x20, TYPE_AMD_IOMMU_DEVICE); >> + iommu_state = AMD_IOMMU_DEVICE(iommu); >> + pci_setup_iommu(bus, bridge_host_amd_iommu, iommu_state); >> } >> + g_free(iommu); >> } >> >> uint64_t mch_mcfg_base(void) >> >