From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aMer0-0000qa-IH for qemu-devel@nongnu.org; Fri, 22 Jan 2016 11:46:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aMeqx-0003dP-Bi for qemu-devel@nongnu.org; Fri, 22 Jan 2016 11:46:30 -0500 References: <96510826-2FD7-4967-9BEC-746DB44A81F8@gmail.com> From: Mark Cave-Ayland Message-ID: <56A25CD0.4060709@ilande.co.uk> Date: Fri, 22 Jan 2016 16:46:08 +0000 MIME-Version: 1.0 In-Reply-To: <96510826-2FD7-4967-9BEC-746DB44A81F8@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] hw/pci-host/uninorth.c: Add support for Apple's PCI bridge register 0x48 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Programmingkid , Alexander Graf , david@gibson.dropbear.id.au Cc: "qemu-ppc@nongnu.org list:PowerPC" , qemu-devel qemu-devel On 22/01/16 16:09, Programmingkid wrote: > Apple has custom PCI bridge registers that are not a part of any known standard. This patch implements register 0x48. With this patch the AppleMacRiscPCI kernel extension no longer prints these error messages for the mac99 target: > AppleMacRiscPCI: bad range 2(80000000:01000000) > AppleMacRiscPCI: bad range 2(81000000:00001000) > AppleMacRiscPCI: bad range 2(81080000:00080000) > > Signed-off-by: John Arbuckle > > --- > hw/pci-host/uninorth.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c > index 215b64f..6541b10 100644 > --- a/hw/pci-host/uninorth.c > +++ b/hw/pci-host/uninorth.c > @@ -330,6 +330,10 @@ static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp) > d->config[0x0C] = 0x08; // cache_line_size > d->config[0x0D] = 0x10; // latency_timer > // d->config[0x34] = 0x80; // capabilities_pointer > + d->config[0x48] = 0x0; > + d->config[0x49] = 0x0; > + d->config[0x4a] = 0x0; > + d->config[0x4b] = 0x1; > } > > static void u3_agp_pci_host_realize(PCIDevice *d, Error **errp) Tested-by: Mark Cave-Ayland As this config space register is seemingly an Apple custom option (or at least I can't find a mention of it in the PCI-PCI bridge spec) I think this should have a comment explaining exactly what it does, and should reference both AppleMacRiscPCI.cpp filename and the enum for the register value (0x48 == kMacRISCPCIAddressSelect). I'd also like to see a note explaining that this sets up the register to match the PCI memory region base/size currently used in QEMU/OpenBIOS too in order to provide a hint that if one changes, so must the other. BTW is the register required for any of the other uni-north realize functions? Alex? ATB, Mark.