From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46409) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTUuM-0004gy-Mw for qemu-devel@nongnu.org; Wed, 10 Feb 2016 08:34:15 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aTUuI-0008Ki-IP for qemu-devel@nongnu.org; Wed, 10 Feb 2016 08:34:14 -0500 Received: from mx2.suse.de ([195.135.220.15]:58322) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aTUuI-0008JT-BU for qemu-devel@nongnu.org; Wed, 10 Feb 2016 08:34:10 -0500 References: From: =?UTF-8?Q?Andreas_F=c3=a4rber?= Message-ID: <56BB3C50.7000906@suse.de> Date: Wed, 10 Feb 2016 14:34:08 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] target-arm: Fix MDCCSR_EL0 instruction encoding List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Dirk_M=c3=bcller?= , QEMU Developers Cc: Peter Maydell Am 09.02.2016 um 21:57 schrieb Dirk M=FCller: > See C5.1.5 of the ARMv8 Reference Manual >=20 > Signed-off-by: Dirk Mueller Reviewed-by: Andreas F=E4rber Thanks, Andreas --=20 SUSE Linux GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Felix Imend=F6rffer, Jane Smithard, Graham Norton; HRB 21284 (AG N=FC= rnberg)